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Class Information
Number: 711/5
Name: Electrical computers and digital processing systems: memory > Addressing combined with specific memory configuration or system > For multiple memory modules (e.g., banks, interleaved memory)
Description: Subject matter wherein logical addresses are determined and mapped (e.g., interleaving) across different physical memory

Patents under this class:
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Patent Number Title Of Patent Date Issued
7107386 Memory bus arbitration using memory bank readiness Sep. 12, 2006
7107412 Distributed processor memory module and method Sep. 12, 2006
7099988 Apparatus and method to read information from an information storage medium Aug. 29, 2006
7099989 System and technique to reduce cycle time by performing column redundancy checks during a delay to accommodate variations in timing of a data strobe signal Aug. 29, 2006
7096324 Embedded processor with dual-port SRAM for programmable logic Aug. 22, 2006
7093059 Read-write switching method for a memory controller Aug. 15, 2006
7093062 Flash memory data bus for synchronous burst read page Aug. 15, 2006
7089379 Large high bandwidth memory system Aug. 8, 2006
7089558 Inter-partition message passing method, system and program product for throughput measurement in a partitioned processing environment Aug. 8, 2006
7085186 Method for hiding a refresh in a pseudo-static memory Aug. 1, 2006
7080193 Flash memory with accessible page during write Jul. 18, 2006
7080225 Method and apparatus for managing migration of data in a computer system Jul. 18, 2006
7076617 Adaptive page management Jul. 11, 2006
7076618 Memory controllers with interleaved mirrored memory modes Jul. 11, 2006
7072986 System and method for displaying storage system topology Jul. 4, 2006
7073012 System and method for interleaving data in a communications device Jul. 4, 2006
7073014 Synchronous non-volatile memory system Jul. 4, 2006
7065608 Apparatus for recording data and method for writing data to flash memory Jun. 20, 2006
7062597 Integrated circuit buffer device Jun. 13, 2006
7062630 Storing device for writing data onto a plurality of installed storing mediums, storing control method for the storing device, and program thereof Jun. 13, 2006
7058756 Circuit for implementing special mode in packet-based semiconductor memory device Jun. 6, 2006
7055012 Latency reduction using negative clock edge and read flags May. 30, 2006
7051151 Integrated circuit buffer device May. 23, 2006
7051171 Method and system for providing a multi-channel interleaver/deinterleaver using SDRAM May. 23, 2006
7051178 Burst write in a non-volatile memory device May. 23, 2006
7047351 Memory hub bypass circuit and method May. 16, 2006
7047371 Integrated memory having a memory cell array containing a plurality of memory banks, and circuit configuration having an integrated memory May. 16, 2006
7047385 High-speed memory for use in networking systems May. 16, 2006
7043598 Method and apparatus for dynamic memory refreshing May. 9, 2006
7043617 System supporting multiple memory modes including a burst extended data out mode May. 9, 2006
7038964 Access to a common memory in which a priority access to a non-active bank is prepared during a non-priority access to a different bank May. 2, 2006
7035161 Semiconductor integrated circuit Apr. 25, 2006
7035962 Pipelined packet-oriented memory system having a unidirectional command and address bus and a bidirectional data bus Apr. 25, 2006
7028135 Multiple partition memory command user interface Apr. 11, 2006
7028156 Use of read data tracking and caching to recover from data corruption Apr. 11, 2006
7028209 I2C repeater with voltage translation Apr. 11, 2006
7024515 Methods and apparatus for performing continue actions using an associative memory which might be particularly useful for implementing access control list and quality of service features Apr. 4, 2006
7024578 Array of synchronized memory modules Apr. 4, 2006
7020736 Method and apparatus for sharing memory space across mutliple processing units Mar. 28, 2006
7020737 Pipelined burst memory access Mar. 28, 2006
7020739 Memory controller, flash memory system having memory controller and method for controlling flash memory device Mar. 28, 2006
7020757 Providing an arrangement of memory devices to enable high-speed data access Mar. 28, 2006
7020758 Context sensitive storage management Mar. 28, 2006
7017002 System featuring a master device, a buffer device and a plurality of integrated circuit memory devices Mar. 21, 2006
7017017 Memory controllers with interleaved mirrored memory modes Mar. 21, 2006
7010642 System featuring a controller device and a memory module that includes an integrated circuit buffer device and a plurality of integrated circuit memory devices Mar. 7, 2006
7010654 Methods and systems for re-ordering commands to access memory Mar. 7, 2006
7010656 Method and apparatus for memory management Mar. 7, 2006
7007130 Memory system including a memory module having a memory module controller interfacing between a system memory controller and memory devices of the memory module Feb. 28, 2006

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