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Class Information
Number: 711/5
Name: Electrical computers and digital processing systems: memory > Addressing combined with specific memory configuration or system > For multiple memory modules (e.g., banks, interleaved memory)
Description: Subject matter wherein logical addresses are determined and mapped (e.g., interleaving) across different physical memory
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620793 |
Mapping memory partitions to virtual memory pages |
Nov. 17, 2009 |
| 7620784 |
High speed nonvolatile memory device using parallel writing among a plurality of interfaces |
Nov. 17, 2009 |
| 7617367 |
Memory system including a two-on-one link memory subsystem interconnection |
Nov. 10, 2009 |
| 7617356 |
Refresh port for a dynamic memory |
Nov. 10, 2009 |
| 7617350 |
Carrier having daisy chained memory chips |
Nov. 10, 2009 |
| 7613866 |
Method for controlling access to a multibank memory |
Nov. 3, 2009 |
| 7609562 |
Configurable device ID in non-volatile memory |
Oct. 27, 2009 |
| 7594088 |
System and method for an asynchronous data buffer having buffer write and read pointers |
Sep. 22, 2009 |
| 7587559 |
Systems and methods for memory module power management |
Sep. 8, 2009 |
| 7587545 |
Shared memory device |
Sep. 8, 2009 |
| 7587515 |
Method and system for restrictive caching of user-specific fragments limited to a fragment cache closest to a user |
Sep. 8, 2009 |
| 7584336 |
Systems and methods for providing data modification operations in memory subsystems |
Sep. 1, 2009 |
| 7584321 |
Memory address and datapath multiplexing |
Sep. 1, 2009 |
| 7581073 |
Systems and methods for providing distributed autonomous power management in a memory system |
Aug. 25, 2009 |
| 7580997 |
State recovery |
Aug. 25, 2009 |
| 7577760 |
Memory systems, modules, controllers and methods using dedicated data and control busses |
Aug. 18, 2009 |
| 7574573 |
Reactive placement controller for interfacing with banked memory storage |
Aug. 11, 2009 |
| 7571274 |
Method and system for virtual enclosure management |
Aug. 4, 2009 |
| 7565343 |
Search apparatus and search management method for fixed-length data |
Jul. 21, 2009 |
| 7564727 |
Apparatus and method for configurable power management |
Jul. 21, 2009 |
| 7562202 |
Systems, methods, computer readable medium and apparatus for memory management using NVRAM |
Jul. 14, 2009 |
| 7562184 |
DRAM controller for graphics processing operable to enable/disable burst transfer |
Jul. 14, 2009 |
| 7562178 |
Memory hub and method for memory sequencing |
Jul. 14, 2009 |
| 7558934 |
Data storage unit, data storage controlling apparatus and method, and data storage controlling program |
Jul. 7, 2009 |
| 7558933 |
Synchronous dynamic random access memory interface and method |
Jul. 7, 2009 |
| 7558908 |
Structure of sequencers that perform initial and periodic calibrations in a memory system |
Jul. 7, 2009 |
| 7549013 |
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
Jun. 16, 2009 |
| 7546451 |
Continuously providing instructions to a programmable device |
Jun. 9, 2009 |
| 7546424 |
Embedded processor with dual-port SRAM for programmable logic |
Jun. 9, 2009 |
| 7546386 |
Method for virtual resource initialization on a physical adapter that supports virtual resources |
Jun. 9, 2009 |
| 7545664 |
Memory system having self timed daisy chained memory chips |
Jun. 9, 2009 |
| 7543106 |
Apparatus and method for controlling refresh of semiconductor memory device according to positional information of memory chips |
Jun. 2, 2009 |
| 7543102 |
System and method for performing multi-rank command scheduling in DDR SDRAM memory systems |
Jun. 2, 2009 |
| 7539842 |
Computer memory system for selecting memory buses according to physical memory organization information stored in virtual address translation tables |
May. 26, 2009 |
| 7539811 |
Scaleable memory systems using third dimension memory |
May. 26, 2009 |
| 7536519 |
Memory access control apparatus and method for accomodating effects of signal delays caused by load |
May. 19, 2009 |
| 7536499 |
Memory access control device and processing system having same |
May. 19, 2009 |
| 7533213 |
Memory hub and method for memory system performance monitoring |
May. 12, 2009 |
| 7533212 |
System memory board subsystem using DRAM with integrated high speed point to point links |
May. 12, 2009 |
| 7526597 |
Buffered memory having a control bus and dedicated data lines |
Apr. 28, 2009 |
| 7526596 |
Methods and systems for an identifier-based memory section |
Apr. 28, 2009 |
| 7523248 |
System having a controller device, a buffer device and a plurality of memory devices |
Apr. 21, 2009 |
| 7523230 |
Device and method for maximizing performance on a memory interface with a variable number of channels |
Apr. 21, 2009 |
| 7519788 |
System and method for an asynchronous data buffer having buffer write and read pointers |
Apr. 14, 2009 |
| 7519762 |
Method and apparatus for selective DRAM precharge |
Apr. 14, 2009 |
| 7519696 |
Method and apparatus for dynamically modifying a computer system configuration |
Apr. 14, 2009 |
| 7516282 |
Control device and control method for memory |
Apr. 7, 2009 |
| 7516264 |
Programmable bank/timer address folding in memory devices |
Apr. 7, 2009 |
| 7512847 |
Method for estimating and reporting the life expectancy of flash-disk memory |
Mar. 31, 2009 |
| 7509302 |
Device, method and program for providing a high-performance storage access environment while issuing a volume access request including an address of a volume to access |
Mar. 24, 2009 |
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