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Class Information
Number: 711/205
Name: Electrical computers and digital processing systems: memory > Address formation > Address mapping (e.g., conversion, translation) > Virtual addressing > Predicting, look-ahead > Directories and tables (e.g., dlat, tlb)
Description: Subject matter wherein a memory
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620793 |
Mapping memory partitions to virtual memory pages |
Nov. 17, 2009 |
| 7617380 |
System and method for synchronizing translation lookaside buffer access in a multithread processor |
Nov. 10, 2009 |
| 7617379 |
Multi-hit control method for shared TLB in a multiprocessor system |
Nov. 10, 2009 |
| 7596655 |
Flash storage system with data storage security |
Sep. 29, 2009 |
| 7596663 |
Identifying a cache way of a cache access request using information from the microtag and from the micro TLB |
Sep. 29, 2009 |
| 7577816 |
Remote translation mechanism for a multinode system |
Aug. 18, 2009 |
| 7558911 |
Maintaining disk cache coherency in multiple operating system environment |
Jul. 7, 2009 |
| 7558939 |
Three-tiered translation lookaside buffer hierarchy in a multithreading microprocessor |
Jul. 7, 2009 |
| 7552275 |
Method of performing table lookup operation with table index that exceeds CAM key size |
Jun. 23, 2009 |
| 7552255 |
Dynamically partitioning pipeline resources |
Jun. 23, 2009 |
| 7552254 |
Associating address space identifiers with active contexts |
Jun. 23, 2009 |
| 7543132 |
Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes |
Jun. 2, 2009 |
| 7543131 |
Controlling an I/O MMU |
Jun. 2, 2009 |
| 7543291 |
Processor purging system and method |
Jun. 2, 2009 |
| 7543133 |
Latency tolerant distributed shared memory multiprocessor computer |
Jun. 2, 2009 |
| 7536521 |
Computer storage device providing implicit detection of block liveness |
May. 19, 2009 |
| 7536530 |
Method and apparatus for determining a dynamic random access memory page management implementation |
May. 19, 2009 |
| 7533220 |
Microprocessor with improved data stream prefetching |
May. 12, 2009 |
| 7533224 |
Apparatus, method and computer program for content utilization management |
May. 12, 2009 |
| 7526627 |
Storage system and storage system construction control method |
Apr. 28, 2009 |
| 7516279 |
Method using stream prefetching history to improve data prefetching performance. |
Apr. 7, 2009 |
| 7516282 |
Control device and control method for memory |
Apr. 7, 2009 |
| 7516297 |
Memory management |
Apr. 7, 2009 |
| 7509476 |
Advanced processor translation lookaside buffer management in a multithreaded system |
Mar. 24, 2009 |
| 7506128 |
Smart card with volatile memory file subsystem |
Mar. 17, 2009 |
| 7506132 |
Validity of address ranges used in semi-synchronous memory copy operations |
Mar. 17, 2009 |
| 7502872 |
Method for out of user space block mode I/O directly between an application instance and an I/O adapter |
Mar. 10, 2009 |
| 7499834 |
System and methods for reporting device allocation |
Mar. 3, 2009 |
| 7500067 |
System and method for allocating memory to input-output devices in a multiprocessor computer system |
Mar. 3, 2009 |
| 7493465 |
Method and system for extended memory with user mode input/output operations |
Feb. 17, 2009 |
| 7490200 |
L2 cache controller with slice directory and unified cache structure |
Feb. 10, 2009 |
| 7490216 |
Methods for accessing multiple page tables in a computer system |
Feb. 10, 2009 |
| 7487303 |
Flash memory device and associated data merge method |
Feb. 3, 2009 |
| 7484073 |
Tagged translation lookaside buffers in a hypervisor computing environment |
Jan. 27, 2009 |
| 7483905 |
Database access device and method of accessing a database |
Jan. 27, 2009 |
| 7480769 |
Microprocessor with improved data stream prefetching |
Jan. 20, 2009 |
| 7475219 |
Serially indexing a cache memory |
Jan. 6, 2009 |
| 7467282 |
Migrating a traditional volume to a virtual volume in a storage system |
Dec. 16, 2008 |
| 7464198 |
System on a chip and a method for programming a DMA controller in a system on a chip |
Dec. 9, 2008 |
| 7454590 |
Multithreaded processor having a source processor core to subsequently delay continued processing of demap operation until responses are received from each of remaining processor cores |
Nov. 18, 2008 |
| 7447868 |
Using vector processors to accelerate cache lookups |
Nov. 4, 2008 |
| 7447869 |
Method and apparatus for fragment processing in a virtual memory system |
Nov. 4, 2008 |
| 7434100 |
Systems and methods for replicating virtual memory on a host computer and debugging using replicated memory |
Oct. 7, 2008 |
| 7426625 |
Data processing system and computer program product for support of system memory addresses with holes |
Sep. 16, 2008 |
| 7412585 |
Method for controlling disk drive using an address translation table |
Aug. 12, 2008 |
| 7409524 |
System and method for responding to TLB misses |
Aug. 5, 2008 |
| 7409494 |
Extension of write anywhere file system layout |
Aug. 5, 2008 |
| 7395405 |
Method and apparatus for supporting address translation in a virtual machine environment |
Jul. 1, 2008 |
| 7389402 |
Microprocessor including a configurable translation lookaside buffer |
Jun. 17, 2008 |
| 7389400 |
Apparatus and method for selectively invalidating entries in an address translation cache |
Jun. 17, 2008 |
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