 |
|
 |
| |
 |
|
Class Information
Number: 711/168
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Access timing > Concurrent accessing
Description: Subject matter further including means or steps wherein multiple memory
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7613866 |
Method for controlling access to a multibank memory |
Nov. 3, 2009 |
| 7613886 |
Methods and apparatus for synchronizing data access to a local memory in a multi-processor system |
Nov. 3, 2009 |
| 7610200 |
System and method for controlling sound data |
Oct. 27, 2009 |
| 7610447 |
Upgradable memory system with reconfigurable interconnect |
Oct. 27, 2009 |
| 7607134 |
Efficient serialization of bursty out-of-order results |
Oct. 20, 2009 |
| 7603534 |
Synchronous flash memory with status burst output |
Oct. 13, 2009 |
| 7596669 |
Apparatus and method for managing memory in a network switch |
Sep. 29, 2009 |
| 7594089 |
Smart memory based synchronization controller for a multi-threaded multiprocessor SoC |
Sep. 22, 2009 |
| 7590811 |
Methods and system for improving data and application availability in clusters |
Sep. 15, 2009 |
| 7577789 |
Upgradable memory system with reconfigurable interconnect |
Aug. 18, 2009 |
| 7577774 |
Independent source read and destination write enhanced DMA |
Aug. 18, 2009 |
| 7558934 |
Data storage unit, data storage controlling apparatus and method, and data storage controlling program |
Jul. 7, 2009 |
| 7558933 |
Synchronous dynamic random access memory interface and method |
Jul. 7, 2009 |
| 7558127 |
Data output circuit and method in DDR synchronous semiconductor device |
Jul. 7, 2009 |
| 7552301 |
Information processing apparatus and memory access arranging method |
Jun. 23, 2009 |
| 7552247 |
Increased computer peripheral throughput by using data available withholding |
Jun. 23, 2009 |
| 7549013 |
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
Jun. 16, 2009 |
| 7546416 |
Method for substantially uninterrupted cache readout |
Jun. 9, 2009 |
| 7535592 |
Image processing apparatus for simultaneous processing of a plurality of print data |
May. 19, 2009 |
| 7533232 |
Accessing data from different memory locations in the same cycle |
May. 12, 2009 |
| 7529886 |
Method, system and storage medium for lockless InfiniBand.TM. poll for I/O completion |
May. 5, 2009 |
| 7529896 |
Memory modules having a memory hub containing a posted write buffer, a memory device interface and a link interface, and method of posting write requests in memory modules |
May. 5, 2009 |
| 7526626 |
Memory controller configurable to allow bandwidth/latency tradeoff |
Apr. 28, 2009 |
| 7523270 |
Multi-port memory device |
Apr. 21, 2009 |
| 7523250 |
Semiconductor memory system and semiconductor memory chip |
Apr. 21, 2009 |
| 7523255 |
Method and apparatus for efficient storage and retrieval of multiple content streams |
Apr. 21, 2009 |
| 7515500 |
Memory device performance enhancement through pre-erase mechanism |
Apr. 7, 2009 |
| 7512766 |
Controlling preemptive work balancing in data storage |
Mar. 31, 2009 |
| 7512763 |
Transparent SDRAM in an embedded environment |
Mar. 31, 2009 |
| 7512756 |
Performance improvement for block span replication |
Mar. 31, 2009 |
| 7512747 |
Method and apparatus for efficiently supporting multiple one-time table access operations in a hierarchical memory setting |
Mar. 31, 2009 |
| 7508397 |
Rendering of disjoint and overlapping blits |
Mar. 24, 2009 |
| 7505356 |
Multi-column addressing mode memory system including an integrated circuit memory device |
Mar. 17, 2009 |
| 7505890 |
Hard disk drive emulator |
Mar. 17, 2009 |
| 7500075 |
Mechanism for enabling full data bus utilization without increasing data granularity |
Mar. 3, 2009 |
| 7487302 |
Service layer architecture for memory access system and method |
Feb. 3, 2009 |
| 7487317 |
Cache-aware scheduling for a chip multithreading processor |
Feb. 3, 2009 |
| 7487316 |
Archive and restore system and methodology for on-line edits utilizing non-volatile buffering |
Feb. 3, 2009 |
| 7484028 |
Burst-capable bus bridges for coupling devices to interface buses |
Jan. 27, 2009 |
| 7478231 |
Storage control apparatus |
Jan. 13, 2009 |
| 7475210 |
Data stream generation method for enabling high-speed memory access |
Jan. 6, 2009 |
| 7475182 |
System-on-a-chip mixed bus architecture |
Jan. 6, 2009 |
| 7472236 |
Managing mirrored memory transactions and error recovery |
Dec. 30, 2008 |
| 7469308 |
Hierarchical bus structure and memory access protocol for multiprocessor systems |
Dec. 23, 2008 |
| 7467265 |
System and method for block conflict resolution within consistency interval marker based replication |
Dec. 16, 2008 |
| 7466607 |
Memory access system and method using de-coupled read and write circuits |
Dec. 16, 2008 |
| 7467261 |
Dual storage apparatus and control method for the dual storage apparatus |
Dec. 16, 2008 |
| 7464241 |
Memory transaction burst operation and memory components supporting temporally multiplexed error correction coding |
Dec. 9, 2008 |
| 7461199 |
Pipelined parallel programming operation in a non-volatile memory system |
Dec. 2, 2008 |
| 7453761 |
Method and system for low cost line buffer system design |
Nov. 18, 2008 |
|
|
|
 |
|
 |
|
| |
Randomly Featured Patents |
|
