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Class Information
Number: 711/158
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Control technique > Prioritizing
Description: Subject matter including banks or modules which are arranged so that a given physical memory
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7617352 |
Memory controller, flash memory system having memory controller and method for controlling flash memory device |
Nov. 10, 2009 |
| 7617358 |
Methods and structure for writing lead-in sequences for head stability in a dynamically mapped mass storage device |
Nov. 10, 2009 |
| 7617368 |
Memory interface with independent arbitration of precharge, activate, and read/write |
Nov. 10, 2009 |
| 7610458 |
Data processing system, processor and method of data processing that support memory access according to diverse memory models |
Oct. 27, 2009 |
| 7606983 |
Sequential ordering of transactions in digital systems with multiple requestors |
Oct. 20, 2009 |
| 7606944 |
Dynamic input/output optimization within a storage controller |
Oct. 20, 2009 |
| 7603527 |
Resolving false dependencies of speculative load instructions |
Oct. 13, 2009 |
| 7603533 |
System and method for data protection on a storage medium |
Oct. 13, 2009 |
| 7594089 |
Smart memory based synchronization controller for a multi-threaded multiprocessor SoC |
Sep. 22, 2009 |
| 7584229 |
Method and system for priority-based allocation in a storage pool |
Sep. 1, 2009 |
| 7584321 |
Memory address and datapath multiplexing |
Sep. 1, 2009 |
| 7577690 |
Managing checkpoint queues in a multiple node system |
Aug. 18, 2009 |
| 7577814 |
Firmware memory management |
Aug. 18, 2009 |
| 7573484 |
Image processing apparatus and controlling method therefor |
Aug. 11, 2009 |
| 7574573 |
Reactive placement controller for interfacing with banked memory storage |
Aug. 11, 2009 |
| 7571296 |
Memory controller-adaptive 1T/2T timing control |
Aug. 4, 2009 |
| 7565497 |
Coarse write barrier control mechanism |
Jul. 21, 2009 |
| 7565498 |
System and method for maintaining write order fidelity in a distributed environment |
Jul. 21, 2009 |
| 7562196 |
Method and apparatus for determining precedence in a classification engine |
Jul. 14, 2009 |
| 7562194 |
Method and apparatus for exploiting parallelism across multiple traffic streams through a single channel |
Jul. 14, 2009 |
| 7558923 |
Prevention of live-lock in a multi-processor system |
Jul. 7, 2009 |
| 7555613 |
Storage access prioritization using a data storage device |
Jun. 30, 2009 |
| 7552301 |
Information processing apparatus and memory access arranging method |
Jun. 23, 2009 |
| 7546425 |
Data processor with a built-in memory |
Jun. 9, 2009 |
| 7543122 |
System and method for obscuring hand-held device data traffic information |
Jun. 2, 2009 |
| 7543132 |
Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes |
Jun. 2, 2009 |
| 7533227 |
Method for priority scheduling and priority dispatching of store conditional operations in a store queue |
May. 12, 2009 |
| 7533223 |
System and method for handling memory requests in a multiprocessor shared memory system |
May. 12, 2009 |
| 7529896 |
Memory modules having a memory hub containing a posted write buffer, a memory device interface and a link interface, and method of posting write requests in memory modules |
May. 5, 2009 |
| 7529830 |
Storage system and communication control method |
May. 5, 2009 |
| 7529895 |
Method for prefetching non-contiguous data structures |
May. 5, 2009 |
| 7526606 |
High-speed redundant disk controller methods and systems |
Apr. 28, 2009 |
| 7526628 |
Optimizing cache efficiency within application software |
Apr. 28, 2009 |
| 7523266 |
Method and apparatus for enforcing memory reference ordering requirements at the L1 cache level |
Apr. 21, 2009 |
| 7523157 |
Managing a plurality of processors as devices |
Apr. 21, 2009 |
| 7519744 |
Method and apparatus for managing I/O paths on a storage network using priority |
Apr. 14, 2009 |
| 7516295 |
Method of remapping flash memory |
Apr. 7, 2009 |
| 7512743 |
Using shared memory with an execute-in-place processor and a co-processor |
Mar. 31, 2009 |
| 7512753 |
Disk array control apparatus and method |
Mar. 31, 2009 |
| 7512754 |
System and method for optimizing storage utilization |
Mar. 31, 2009 |
| 7512740 |
Microprocessor with improved data stream prefetching |
Mar. 31, 2009 |
| 7506104 |
Packet processor memory interface with speculative memory reads |
Mar. 17, 2009 |
| 7506114 |
Data transfer device which executes DMA transfer, semiconductor integrated circuit device and data transfer method |
Mar. 17, 2009 |
| 7506122 |
Restricting memory access to protect data when sharing a common address space |
Mar. 17, 2009 |
| 7506126 |
Detection circuit for mixed asynchronous and synchronous memory operation |
Mar. 17, 2009 |
| 7496722 |
Memory mapped page priorities |
Feb. 24, 2009 |
| 7496721 |
Packet processor memory interface with late order binding |
Feb. 24, 2009 |
| 7487314 |
Restricting memory access to protect data when sharing a common address space |
Feb. 3, 2009 |
| 7487313 |
Restricting memory access to protect data when sharing a common address space |
Feb. 3, 2009 |
| 7487305 |
Prioritized bus request scheduling mechanism for processing devices |
Feb. 3, 2009 |
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