| Patent Number |
Title Of Patent |
Date Issued |
| 6356984 |
Digital data processing system having a data bus and a control bus |
Mar. 12, 2002 |
| 6353863 |
Terminal |
Mar. 5, 2002 |
| 6353869 |
Adaptive delay of polling frequencies in a distributed system with a queued lock |
Mar. 5, 2002 |
| 6349370 |
Multiple bus shared memory parallel processor and processing method |
Feb. 19, 2002 |
| 6347362 |
Flexible event monitoring counters in multi-node processor systems and process of operating the same |
Feb. 12, 2002 |
| 6345351 |
Maintenance of speculative state of parallel executed jobs in an information processing system |
Feb. 5, 2002 |
| 6343335 |
System for repositioning an I/O device to a predetermined position to retry a program without knowledge of which part of the program caused the retry |
Jan. 29, 2002 |
| 6341338 |
Protocol for coordinating the distribution of shared memory |
Jan. 22, 2002 |
| 6341339 |
Apparatus and method for maintaining data coherence within a cluster of symmetric multiprocessors |
Jan. 22, 2002 |
| 6339799 |
Method of repositioning an I/O device to a predetermined position to retry a program without knowledge of which part of the program caused the retry |
Jan. 15, 2002 |
| 6338122 |
Non-uniform memory access (NUMA) data processing system that speculatively forwards a read request to a remote processing node |
Jan. 8, 2002 |
| 6336170 |
Method and system in a distributed shared-memory data processing system for determining utilization of shared-memory included within nodes by a designated application |
Jan. 1, 2002 |
| 6336177 |
Method, system and computer program product for managing memory in a non-uniform memory access system |
Jan. 1, 2002 |
| 6334175 |
Switchable memory system and memory allocation method |
Dec. 25, 2001 |
| 6330644 |
Signal processor with a plurality of kinds of processors and a shared memory accessed through a versatile control means |
Dec. 11, 2001 |
| 6330645 |
Multi-stream coherent memory controller apparatus and method |
Dec. 11, 2001 |
| 6324595 |
Dedication of space in descriptor for minimizing data processing during communications between a peripheral device and a host system |
Nov. 27, 2001 |
| 6324601 |
Data structure and method for managing multiple ordered sets |
Nov. 27, 2001 |
| 6324622 |
6XX bus with exclusive intervention |
Nov. 27, 2001 |
| 6321284 |
Multiprocessor system with multiple memory buses for access to shared memories |
Nov. 20, 2001 |
| 6321308 |
Method and apparatus for managing access requests from a plurality of devices using dual level queue locking scheme and a doubly-linked circular queue |
Nov. 20, 2001 |
| 6317819 |
Digital signal processor containing scalar processor and a plurality of vector processors operating from a single instruction |
Nov. 13, 2001 |
| 6314499 |
Non-preemptive memory locking mechanism in a shared resource system |
Nov. 6, 2001 |
| 6311237 |
System including single host buffer for transmit and receive data and reception buffer in interface device having stand-by area for use by host buffer when abnormal state is detected |
Oct. 30, 2001 |
| 6311255 |
System and method for selectively restricting access to memory for bus attached unit IDs |
Oct. 30, 2001 |
| 6311257 |
Method and system for allocating memory for a command queue |
Oct. 30, 2001 |
| 6308243 |
Method and system for controlling exclusive access to shared resources in computers |
Oct. 23, 2001 |
| 6301650 |
Control unit and data processing system |
Oct. 9, 2001 |
| 6298419 |
Protocol for software distributed shared memory with memory scaling |
Oct. 2, 2001 |
| 6298420 |
Coherent variable length reads from system memory |
Oct. 2, 2001 |
| 6295534 |
Apparatus for maintaining an ordered list |
Sep. 25, 2001 |
| 6295578 |
Cascaded removable media data storage system |
Sep. 25, 2001 |
| 6295579 |
Parallel processor system including a cache memory subsystem that has independently addressable local and remote data areas |
Sep. 25, 2001 |
| 6295581 |
Method and apparatus for assuring cache coherency |
Sep. 25, 2001 |
| 6295584 |
Multiprocessor computer system with memory map translation |
Sep. 25, 2001 |
| 6295600 |
Thread switch on blocked load or store using instruction thread field |
Sep. 25, 2001 |
| 6292826 |
Shadow arrays for distributed memory multiprocessor architecture |
Sep. 18, 2001 |
| 6289424 |
Method, system and computer program product for managing memory in a non-uniform memory access system |
Sep. 11, 2001 |
| 6289432 |
Sharing segments of storage by enabling the sharing of page tables |
Sep. 11, 2001 |
| 6282618 |
Secure variable storage for internet applications |
Aug. 28, 2001 |
| 6282637 |
Partially executing a pending atomic instruction to unlock resources when cancellation of the instruction occurs |
Aug. 28, 2001 |
| 6278711 |
Method and apparatus for manipulating an ATM cell |
Aug. 21, 2001 |
| 6279095 |
Method and apparatus for omnibus wiring of virtual mapping table entries |
Aug. 21, 2001 |
| 6275910 |
Storage device and method for data sharing |
Aug. 14, 2001 |
| 6272584 |
System board with consolidated EEPROM module |
Aug. 7, 2001 |
| 6272612 |
Process for allocating memory in a multiprocessor data processing system |
Aug. 7, 2001 |
| 6269413 |
System with multiple dynamically-sized logical FIFOs sharing single memory and with read/write pointers independently selectable and simultaneously responsive to respective read/write FIFO sel |
Jul. 31, 2001 |
| 6269437 |
Duplicator interconnection methods and apparatus for reducing port pressure in a clustered processor |
Jul. 31, 2001 |
| 6266686 |
Emptying packed data state during execution of packed data instructions |
Jul. 24, 2001 |
| 6266745 |
Method and system in a distributed shared-memory data processing system for determining utilization of nodes by each executed thread |
Jul. 24, 2001 |
