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Class Information
Number: 711/147
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Shared memory area
Description: Subject matter wherein at least a portion of the memory


Sub-classes under this class:

Class Number Class Name Patents
711/152 Memory access blocking 836
711/149 Multiport memory 409
711/148 Plural shared memories 544
711/151 Prioritized access regulation 777
711/153 Shared memory partitioning 527
711/150 Simultaneous access regulation 712


Patents under this class:
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Patent Number Title Of Patent Date Issued
6484220 Transfer of data between processors in a multi-processor system Nov. 19, 2002
6480940 Method of controlling cache memory in multiprocessor system and the multiprocessor system based on detection of predetermined software module Nov. 12, 2002
6480945 Method and apparatus for controlling memory access by a plurality of devices Nov. 12, 2002
6477560 Method and apparatus for controlling resource Nov. 5, 2002
6477617 Method for performing atomic, concurrent read and write operations on multiple storage devices Nov. 5, 2002
6477621 Parallel access virtual channel memory system Nov. 5, 2002
6477623 Method for providing graphics controller embedded in a core logic unit Nov. 5, 2002
6477624 Data image management via emulation of non-volatile storage device Nov. 5, 2002
6473821 Multiple processor interface, synchronization, and arbitration scheme using time multiplexed shared memory for real time systems Oct. 29, 2002
6470380 Signal processing device accessible as memory Oct. 22, 2002
6463486 System for handling streaming information using a plurality of reader modules by enumerating output pins and associated streams of information Oct. 8, 2002
6463504 Method and system for dynamically reassigning unused logical volumes from a storage subsystem to an open systems host Oct. 8, 2002
6463513 Cache storage optimization in a data storage library of a redundant copy synchronization token tracking system Oct. 8, 2002
6457106 Shared memory control system and shared memory control method Sep. 24, 2002
6457107 Method and apparatus for reducing false sharing in a distributed computing environment Sep. 24, 2002
6453370 Using of bank tag registers to avoid a background operation collision in memory systems Sep. 17, 2002
6453392 Method of and apparatus for sharing dedicated devices between virtual machine guests Sep. 17, 2002
6449673 Snapshot and recall based mechanism to handle read after read conflict Sep. 10, 2002
6449696 Device and method for input/output control of a computer system for efficient prefetching of data based on lists of data read requests for different computers and time between access requests Sep. 10, 2002
6449699 Apparatus and method for partitioned memory protection in cache coherent symmetric multiprocessor systems Sep. 10, 2002
6446173 Memory controller in a multi-port bridge for a local area network Sep. 3, 2002
6446185 Selective address translation in coherent memory replication Sep. 3, 2002
6442635 Processor architecture for virtualizing selective external bus transactions Aug. 27, 2002
6438646 Storage subsystem having a plurality of interfaces conforming to a plurality of data formats Aug. 20, 2002
6438654 Castout processing for duplexed cache structures Aug. 20, 2002
6438663 System and method for identifying shared virtual memory in a computer cluster Aug. 20, 2002
6438668 Method and apparatus for reducing power consumption in a digital processing system Aug. 20, 2002
6434672 Methods and apparatus for improving system performance with a shared cache memory Aug. 13, 2002
6430659 Method and means for increasing performance of multiprocessor computer systems by reducing accesses to global memory locations through the use of quanta Aug. 6, 2002
6427194 Electronic system and method for display using a decoder and arbiter to selectively allow access to a shared memory Jul. 30, 2002
6418518 Decoupled address and data access to an SDRAM Jul. 9, 2002
6412047 Coherency protocol Jun. 25, 2002
6401174 Multiprocessing computer system employing a cluster communication error reporting mechanism Jun. 4, 2002
6401175 Shared write buffer for use by multiple processor units Jun. 4, 2002
6397270 System for indirect communication between two computers, each having write access to its own portion of a dual-access disk drive and read access to the entire drive May. 28, 2002
6397305 Method and apparatus for controlling shared memory access May. 28, 2002
6397310 Method and apparatus for controlling write access to storage means for a digital data processing circuit May. 28, 2002
6393503 Efficient transfer of data and events between processes and between processes and drivers in a parallel, fault tolerant message based operating system May. 21, 2002
6393529 Conversation of distributed memory bandwidth in multiprocessor system with cache coherency by transmitting cancel subsequent to victim write May. 21, 2002
6393530 Paging method for DSP May. 21, 2002
6388989 Method and apparatus for preventing memory overrun in a data transmission system May. 14, 2002
6389513 Disk block cache management for a distributed shared memory computer system May. 14, 2002
6381659 Method and circuit for controlling a first-in-first-out (FIFO) buffer using a bank of FIFO address registers capturing and saving beginning and ending write-pointer addresses Apr. 30, 2002
6381682 Method and apparatus for dynamically sharing memory in a multiprocessor system Apr. 30, 2002
6381683 Method and system for destination-sensitive memory control and access in data processing systems Apr. 30, 2002
6378049 Universal memory controller Apr. 23, 2002
6366985 High availability asynchronous computer system Apr. 2, 2002
6363458 Adaptive granularity method for integration of fine and coarse communication in the distributed shared memory system Mar. 26, 2002
6360302 Method and system for dynamically changing page types in unified scalable shared-memory architectures Mar. 19, 2002
6360303 Partitioning memory shared by multiple processors of a distributed processing system Mar. 19, 2002

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