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Class Information
Number: 711/147
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Shared memory area
Description: Subject matter wherein at least a portion of the memory
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7614078 |
Threshold access based upon stored credentials |
Nov. 3, 2009 |
| 7613961 |
CPU register diagnostic testing |
Nov. 3, 2009 |
| 7613886 |
Methods and apparatus for synchronizing data access to a local memory in a multi-processor system |
Nov. 3, 2009 |
| 7613885 |
Cache coherency control method, chipset, and multi-processor system |
Nov. 3, 2009 |
| 7613884 |
Multiprocessor system and method ensuring coherency between a main memory and a cache memory |
Nov. 3, 2009 |
| 7613065 |
Multi-port memory device |
Nov. 3, 2009 |
| 7610611 |
Prioritized address decoder |
Oct. 27, 2009 |
| 7610200 |
System and method for controlling sound data |
Oct. 27, 2009 |
| 7606982 |
Multi-path accessible semiconductor memory device having data transmission mode between ports |
Oct. 20, 2009 |
| 7606978 |
Multi-node computer system implementing global access state dependent transactions |
Oct. 20, 2009 |
| 7602512 |
Method and apparatus for authentication in secure printing |
Oct. 13, 2009 |
| 7600080 |
Avoiding deadlocks in a multiprocessor system |
Oct. 6, 2009 |
| 7600065 |
Arbitration scheme for shared memory device |
Oct. 6, 2009 |
| 7599999 |
System and methodology that facilitates client and server data exchange in a distributed industrial automation environment |
Oct. 6, 2009 |
| 7590805 |
Monitor implementation in a multicore processor with inclusive LLC |
Sep. 15, 2009 |
| 7587577 |
Pipelined access by FFT and filter units in co-processor and system bus slave to memory blocks via switch coupling based on control register content |
Sep. 8, 2009 |
| 7587557 |
Data sharing apparatus and processor for sharing data between processors of different endianness |
Sep. 8, 2009 |
| 7587310 |
Sound processor architecture using single port memory unit |
Sep. 8, 2009 |
| 7584332 |
Computer systems with lightweight multi-threaded architectures |
Sep. 1, 2009 |
| 7584228 |
System and method for duplication of virtual private server files |
Sep. 1, 2009 |
| 7581172 |
Method and apparatus for efficient management of XML documents |
Aug. 25, 2009 |
| 7581069 |
Multiple computer system with enhanced memory clean up |
Aug. 25, 2009 |
| 7581061 |
Data migration using temporary volume to migrate high priority data to high performance storage and lower priority data to lower performance storage |
Aug. 25, 2009 |
| 7581060 |
Storage device control apparatus and control method for the storage device control apparatus |
Aug. 25, 2009 |
| 7581056 |
Load balancing using distributed front end and back end virtualization engines |
Aug. 25, 2009 |
| 7577813 |
System and method for enumerating multi-level processor-memory affinities for non-uniform memory access systems |
Aug. 18, 2009 |
| 7577802 |
Accessing a reservable device by transiently clearing a persistent reservation on the device in multi-host system |
Aug. 18, 2009 |
| 7577799 |
Asynchronous, independent and multiple process shared memory system in an adaptive computing architecture |
Aug. 18, 2009 |
| 7577798 |
Space-adaptive lock-free queue using pointer-sized single-target synchronization |
Aug. 18, 2009 |
| 7571289 |
Disk array device and reservation cancellation control method for disk array device |
Aug. 4, 2009 |
| 7571288 |
Scalable rundown protection for object lifetime management |
Aug. 4, 2009 |
| 7568077 |
Information processing apparatus and file controller |
Jul. 28, 2009 |
| 7568074 |
Time based data storage for shared network memory switch |
Jul. 28, 2009 |
| 7568066 |
Reset system for buffer and method thereof |
Jul. 28, 2009 |
| 7568013 |
Multiple message send routine for network packets |
Jul. 28, 2009 |
| 7567992 |
Replicating of plurality of instances of an object model in memory arrangement using portable object references where each object attribute assigned GUID |
Jul. 28, 2009 |
| 7562193 |
Memory with single and dual mode access |
Jul. 14, 2009 |
| 7562109 |
Connectivity confirmation method for network storage device and host computer |
Jul. 14, 2009 |
| 7558920 |
Apparatus and method for partitioning a shared cache of a chip multi-processor |
Jul. 7, 2009 |
| 7558912 |
Disk array system |
Jul. 7, 2009 |
| 7555653 |
Data processing apparatus, program for use therewith, and method for use therewith |
Jun. 30, 2009 |
| 7555597 |
Direct cache access in multiple core processors |
Jun. 30, 2009 |
| 7555527 |
Efficiently linking storage object replicas in a computer network |
Jun. 30, 2009 |
| 7552295 |
Maintaining consistency when mirroring data using different copy technologies |
Jun. 23, 2009 |
| 7549024 |
Multi-processing system with coherent and non-coherent modes |
Jun. 16, 2009 |
| 7548918 |
Techniques for maintaining consistency for different requestors of files in a database management system |
Jun. 16, 2009 |
| 7546423 |
Signal processing system control method and apparatus |
Jun. 9, 2009 |
| 7545383 |
Information processing system, information processor, information processing method, and program |
Jun. 9, 2009 |
| 7543137 |
Information processing device and information processing method |
Jun. 2, 2009 |
| 7543133 |
Latency tolerant distributed shared memory multiprocessor computer |
Jun. 2, 2009 |
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