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Class Information
Number: 711/146
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Coherency > Snooping
Description: Subject matter further comprising cache memory


Patents under this class:
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Patent Number Title Of Patent Date Issued
7620696 System and method for conflict responses in a cache coherency protocol Nov. 17, 2009
7617329 Programmable protocol to support coherent and non-coherent transactions in a multinode system Nov. 10, 2009
7617366 Method and apparatus for filtering snoop requests using mulitiple snoop caches Nov. 10, 2009
7617378 Multiprocessor system with retry-less TLBI protocol Nov. 10, 2009
7613884 Multiprocessor system and method ensuring coherency between a main memory and a cache memory Nov. 3, 2009
7613885 Cache coherency control method, chipset, and multi-processor system Nov. 3, 2009
7606971 Storage control apparatus and external storage apparatus Oct. 20, 2009
7606978 Multi-node computer system implementing global access state dependent transactions Oct. 20, 2009
7603524 Method and apparatus for filtering snoop requests using multiple snoop caches Oct. 13, 2009
7603523 Method and apparatus for filtering snoop requests in a point-to-point interconnect architecture Oct. 13, 2009
RE40921 Mechanism for efficiently processing deferred order-dependent memory access transactions in a pipelined system Sep. 22, 2009
7590805 Monitor implementation in a multicore processor with inclusive LLC Sep. 15, 2009
7584331 Data processing system and method for selectively updating an invalid coherency state in response to snooping a castout Sep. 1, 2009
7584330 Multi-processor data coherency Sep. 1, 2009
7581068 Exclusive ownership snoop filter Aug. 25, 2009
7581064 Utilizing cache information to manage memory access and cache utilization Aug. 25, 2009
7577797 Data processing system, cache system and method for precisely forming an invalid coherency state based upon a combined response Aug. 18, 2009
7577794 Low latency coherency protocol for a multi-chip multiprocessor system Aug. 18, 2009
7577795 Disowning cache entries on aging out of the entry Aug. 18, 2009
7568073 Mechanisms and methods of cache coherence in network-based multiprocessor systems with ring-based snoop response collection Jul. 28, 2009
7565558 Power saving method and system for a central processing unit disposed in a non-snooping sleep state when a peripheral device sends a bus master request Jul. 21, 2009
7555597 Direct cache access in multiple core processors Jun. 30, 2009
7546421 Interconnect transaction translation technique Jun. 9, 2009
7546422 Method and apparatus for the synchronization of distributed caches Jun. 9, 2009
7543115 Two-hop source snoop based cache coherence protocol Jun. 2, 2009
7539823 Multiprocessing apparatus having reduced cache miss occurrences May. 26, 2009
7536515 Repeated conflict acknowledgements in a cache coherency protocol May. 19, 2009
7530066 Controlling snoop activities using task table in multiprocessor system May. 5, 2009
7523265 Systems and arrangements for promoting a line to exclusive in a fill buffer of a cache Apr. 21, 2009
7523268 Reducing number of rejected snoop requests by extending time to respond to snoop request Apr. 21, 2009
7512743 Using shared memory with an execute-in-place processor and a co-processor Mar. 31, 2009
7512741 Two-hop source snoop based messaging protocol Mar. 31, 2009
7502893 System and method for reporting cache coherency state retained within a cache hierarchy of a processing node Mar. 10, 2009
7502895 Techniques for reducing castouts in a snoop filter Mar. 10, 2009
7496713 Method and apparatus for maintaining cache coherency in a memory system with shared only cache memories Feb. 24, 2009
7484044 Method and apparatus for joint cache coherency states in multi-interface caches Jan. 27, 2009
7484046 Reducing number of rejected snoop requests by extending time to respond to snoop request Jan. 27, 2009
7478202 Using the message fabric to maintain cache coherency of local caches of global memory Jan. 13, 2009
7472229 Bus controller initiated write-through mechanism Dec. 30, 2008
7472232 Method and related apparatus for internal data accessing of computer system Dec. 30, 2008
7469267 Method and system for host device event synchronization Dec. 23, 2008
7469275 System having interfaces, switch, and memory bridge for CC-NUMA operation Dec. 23, 2008
7464227 Method and apparatus for supporting opportunistic sharing in coherent multiprocessors Dec. 9, 2008
7461213 Advanced processor system using request, data, snoop, and response rings Dec. 2, 2008
7457924 Hierarchical directories for cache coherency in a multiprocessor system Nov. 25, 2008
7451277 Data processing system, cache system and method for updating an invalid coherency state in response to snooping an operation Nov. 11, 2008
7447845 Data processing system, processor and method of data processing in which local memory access requests are serviced by state machines with differing functionality Nov. 4, 2008
7447844 Data processing system, processor and method of data processing in which local memory access requests are serviced on a fixed schedule Nov. 4, 2008
7437520 Adaptive snoop-and-forward mechanisms for multiprocessor systems Oct. 14, 2008
7434008 System and method for coherency filtering Oct. 7, 2008

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