| |
 |
|
Class Information
Number: 711/145
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Coherency > Access control bit
Description: Subject matter wherein each unit or block of memory
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7613884 |
Multiprocessor system and method ensuring coherency between a main memory and a cache memory |
Nov. 3, 2009 |
| 7610448 |
Obscuring memory access patterns |
Oct. 27, 2009 |
| 7606978 |
Multi-node computer system implementing global access state dependent transactions |
Oct. 20, 2009 |
| 7606981 |
System and method for reducing store latency |
Oct. 20, 2009 |
| 7596665 |
Mechanism for a processor to use locking cache as part of system memory |
Sep. 29, 2009 |
| 7584329 |
Data processing system and method for efficient communication utilizing an Ig coherency state |
Sep. 1, 2009 |
| 7584331 |
Data processing system and method for selectively updating an invalid coherency state in response to snooping a castout |
Sep. 1, 2009 |
| 7581065 |
Low locality-of-reference support in a multi-level cache hierachy |
Aug. 25, 2009 |
| 7577802 |
Accessing a reservable device by transiently clearing a persistent reservation on the device in multi-host system |
Aug. 18, 2009 |
| 7577015 |
Memory content inverting to minimize NTBI effects |
Aug. 18, 2009 |
| 7568073 |
Mechanisms and methods of cache coherence in network-based multiprocessor systems with ring-based snoop response collection |
Jul. 28, 2009 |
| 7558910 |
Detecting access to a memory location in a multithreaded environment |
Jul. 7, 2009 |
| 7555597 |
Direct cache access in multiple core processors |
Jun. 30, 2009 |
| 7546422 |
Method and apparatus for the synchronization of distributed caches |
Jun. 9, 2009 |
| 7543115 |
Two-hop source snoop based cache coherence protocol |
Jun. 2, 2009 |
| 7523260 |
Propagating data using mirrored lock caches |
Apr. 21, 2009 |
| 7523267 |
Method for ensuring fairness among requests within a multi-node computer system |
Apr. 21, 2009 |
| 7519791 |
Address conversion technique in a context switching environment |
Apr. 14, 2009 |
| 7512741 |
Two-hop source snoop based messaging protocol |
Mar. 31, 2009 |
| 7509461 |
Method and apparatus for intelligent buffer cache pre-emption |
Mar. 24, 2009 |
| 7506107 |
Shared memory multiprocessor system |
Mar. 17, 2009 |
| 7502895 |
Techniques for reducing castouts in a snoop filter |
Mar. 10, 2009 |
| 7500068 |
Method and system for managing memory in a multiprocessor system |
Mar. 3, 2009 |
| 7500064 |
Data coherence system |
Mar. 3, 2009 |
| 7496715 |
Programmable cache management system and method |
Feb. 24, 2009 |
| 7496726 |
Controlling contention via transactional timers among conflicting transactions issued by processors operating in insistent or polite mode |
Feb. 24, 2009 |
| 7496966 |
Method and apparatus for controlling operation of a secure execution mode-capable processor in system management mode |
Feb. 24, 2009 |
| 7493453 |
System, method and storage medium for prefetching via memory block tags |
Feb. 17, 2009 |
| 7487295 |
Memory control device and move-in buffer control method |
Feb. 3, 2009 |
| 7484045 |
Store performance in strongly-ordered microprocessor architecture |
Jan. 27, 2009 |
| 7484044 |
Method and apparatus for joint cache coherency states in multi-interface caches |
Jan. 27, 2009 |
| 7484042 |
Data processing system and method for predictively selecting a scope of a prefetch operation |
Jan. 27, 2009 |
| 7480778 |
Method and system for managing point-in-time images |
Jan. 20, 2009 |
| 7475190 |
Direct access of cache lock set data without backing memory |
Jan. 6, 2009 |
| 7472229 |
Bus controller initiated write-through mechanism |
Dec. 30, 2008 |
| 7472302 |
Method and apparatus for reducing leakage power in a cache memory using adaptive time-based decay |
Dec. 30, 2008 |
| 7467280 |
Method for reconfiguring cache memory based on at least analysis of heat generated during runtime, at least by associating an access bit with a cache line and associating a granularity bit wit |
Dec. 16, 2008 |
| 7454577 |
Data processing system and method for efficient communication utilizing an Tn and Ten coherency states |
Nov. 18, 2008 |
| 7437513 |
Cache memory with the number of operated ways being changed according to access pattern |
Oct. 14, 2008 |
| 7428615 |
System and method for maintaining coherency and tracking validity in a cache hierarchy |
Sep. 23, 2008 |
| 7426627 |
Selective address translation for a resource such as a hardware device |
Sep. 16, 2008 |
| 7418555 |
Multiprocessor system and method to maintain cache coherence |
Aug. 26, 2008 |
| 7415556 |
Exclusion control |
Aug. 19, 2008 |
| 7395380 |
Selective snooping by snoop masters to locate updated data |
Jul. 1, 2008 |
| 7389389 |
System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor system |
Jun. 17, 2008 |
| 7389388 |
Data processing system and method for efficient communication utilizing an in coherency state |
Jun. 17, 2008 |
| 7389383 |
Selectively unmarking load-marked cache lines during transactional program execution |
Jun. 17, 2008 |
| 7389379 |
Selective disk offlining |
Jun. 17, 2008 |
| 7386680 |
Apparatus and method of controlling data sharing on a shared memory computer system |
Jun. 10, 2008 |
| 7386679 |
System, method and storage medium for memory management |
Jun. 10, 2008 |
|
|
|
