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Class Information
Number: 711/144
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Coherency > Cache status data bit
Description: Subject matter wherein coherency for each unit or block of data
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620687 |
Distributed request routing |
Nov. 17, 2009 |
| 7620778 |
Low power microprocessor cache memory and method of operation |
Nov. 17, 2009 |
| 7620779 |
System and method for handling direct memory accesses |
Nov. 17, 2009 |
| 7617372 |
Avoiding copy on first write |
Nov. 10, 2009 |
| 7613884 |
Multiprocessor system and method ensuring coherency between a main memory and a cache memory |
Nov. 3, 2009 |
| 7613886 |
Methods and apparatus for synchronizing data access to a local memory in a multi-processor system |
Nov. 3, 2009 |
| 7610448 |
Obscuring memory access patterns |
Oct. 27, 2009 |
| 7606978 |
Multi-node computer system implementing global access state dependent transactions |
Oct. 20, 2009 |
| 7606980 |
Demand-based error correction |
Oct. 20, 2009 |
| 7603026 |
Information processing method and information processing apparatus |
Oct. 13, 2009 |
| 7603524 |
Method and apparatus for filtering snoop requests using multiple snoop caches |
Oct. 13, 2009 |
| 7600079 |
Performing a memory write of a data unit without changing ownership of the data unit |
Oct. 6, 2009 |
| 7600152 |
Configuring cache memory from a storage controller |
Oct. 6, 2009 |
| 7596665 |
Mechanism for a processor to use locking cache as part of system memory |
Sep. 29, 2009 |
| 7594145 |
Improving performance of a processor having a defective cache |
Sep. 22, 2009 |
| 7584329 |
Data processing system and method for efficient communication utilizing an Ig coherency state |
Sep. 1, 2009 |
| 7584330 |
Multi-processor data coherency |
Sep. 1, 2009 |
| 7584331 |
Data processing system and method for selectively updating an invalid coherency state in response to snooping a castout |
Sep. 1, 2009 |
| 7581067 |
Load when reservation lost instruction for performing cacheline polling |
Aug. 25, 2009 |
| 7581065 |
Low locality-of-reference support in a multi-level cache hierachy |
Aug. 25, 2009 |
| 7581064 |
Utilizing cache information to manage memory access and cache utilization |
Aug. 25, 2009 |
| 7581025 |
System and method for synchronizing copies of data in a computer system |
Aug. 25, 2009 |
| 7577015 |
Memory content inverting to minimize NTBI effects |
Aug. 18, 2009 |
| 7577791 |
Virtualized load buffers |
Aug. 18, 2009 |
| 7577795 |
Disowning cache entries on aging out of the entry |
Aug. 18, 2009 |
| 7574572 |
Cache memory, system, and method of storing data |
Aug. 11, 2009 |
| 7571285 |
Data classification in shared cache of multiple-core processor |
Aug. 4, 2009 |
| 7565490 |
Out of order graphics L2 cache |
Jul. 21, 2009 |
| 7558923 |
Prevention of live-lock in a multi-processor system |
Jul. 7, 2009 |
| 7555611 |
Memory management of local variables upon a change of context |
Jun. 30, 2009 |
| 7552286 |
Performance of a cache by detecting cache lines that have been reused |
Jun. 23, 2009 |
| 7549025 |
Efficient marking of shared cache lines |
Jun. 16, 2009 |
| 7546420 |
Efficient trace cache management during self-modifying code processing |
Jun. 9, 2009 |
| 7543116 |
Data processing system, cache system and method for handling a flush operation in a data processing system having multiple coherency domains |
Jun. 2, 2009 |
| 7529888 |
Software caching with bounded-error delayed update |
May. 5, 2009 |
| 7526611 |
Unified processor cache model in multiprocessor system |
Apr. 28, 2009 |
| 7523266 |
Method and apparatus for enforcing memory reference ordering requirements at the L1 cache level |
Apr. 21, 2009 |
| 7523267 |
Method for ensuring fairness among requests within a multi-node computer system |
Apr. 21, 2009 |
| 7519775 |
Enforcing memory-reference ordering requirements at the L2 cache level |
Apr. 14, 2009 |
| 7519774 |
Data processor having a memory control unit with cache memory |
Apr. 14, 2009 |
| 7509461 |
Method and apparatus for intelligent buffer cache pre-emption |
Mar. 24, 2009 |
| 7506103 |
Cache operation with non-cache memory |
Mar. 17, 2009 |
| 7506107 |
Shared memory multiprocessor system |
Mar. 17, 2009 |
| 7502893 |
System and method for reporting cache coherency state retained within a cache hierarchy of a processing node |
Mar. 10, 2009 |
| 7502894 |
Shared rowset |
Mar. 10, 2009 |
| 7500064 |
Data coherence system |
Mar. 3, 2009 |
| 7500065 |
Data processing system and method for efficient L3 cache directory management |
Mar. 3, 2009 |
| 7496726 |
Controlling contention via transactional timers among conflicting transactions issued by processors operating in insistent or polite mode |
Feb. 24, 2009 |
| 7496715 |
Programmable cache management system and method |
Feb. 24, 2009 |
| 7493452 |
Method to efficiently prefetch and batch compiler-assisted software cache accesses |
Feb. 17, 2009 |
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