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Class Information
Number: 711/141
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Coherency
Description: Subject matter further comprising means or steps not specifically covered above for assuring that the data
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7062610 |
Method and apparatus for reducing overhead in a data processing system with a cache |
Jun. 13, 2006 |
| 7062611 |
Dirty data protection for cache memories |
Jun. 13, 2006 |
| 7062631 |
Method and system for enforcing consistent per-physical page cacheability attributes |
Jun. 13, 2006 |
| 7062636 |
Ordering scheme with architectural operation decomposed into result producing speculative micro-operation and exception producing architectural micro-operation |
Jun. 13, 2006 |
| 7058665 |
Verification of data coherency in word-addressable files that support concurrent access |
Jun. 6, 2006 |
| 7051102 |
Peer-to-peer name resolution protocol (PNRP) security infrastructure and method |
May. 23, 2006 |
| 7051163 |
Directory structure permitting efficient write-backs in a shared memory computer system |
May. 23, 2006 |
| 7051164 |
Coherence-free cache |
May. 23, 2006 |
| 7047322 |
System and method for performing conflict resolution and flow control in a multiprocessor system |
May. 16, 2006 |
| 7047341 |
Multi-processing memory duplication system |
May. 16, 2006 |
| 7047364 |
Cache memory management |
May. 16, 2006 |
| 7047365 |
Cache line purge and update instruction |
May. 16, 2006 |
| 7047366 |
QOS feature knobs |
May. 16, 2006 |
| 7043610 |
System and method for maintaining cache coherency without external controller intervention |
May. 9, 2006 |
| 7043612 |
Compute node to mesh interface for highly scalable parallel processing system and method of exchanging data |
May. 9, 2006 |
| 7039765 |
Techniques for cache memory management using read and write operations |
May. 2, 2006 |
| 7039767 |
Method and system for coherently caching I/O devices across a network |
May. 2, 2006 |
| 7039901 |
Software shared memory bus |
May. 2, 2006 |
| 7035952 |
System having storage subsystems and a link coupling the storage subsystems |
Apr. 25, 2006 |
| 7035981 |
Asynchronous input/output cache having reduced latency |
Apr. 25, 2006 |
| 7032033 |
Handling collisions during synchronization of data between client and server computers |
Apr. 18, 2006 |
| 7032073 |
Cache system for network and multi-tasking applications |
Apr. 18, 2006 |
| 7032077 |
Multiple cache coherency |
Apr. 18, 2006 |
| 7032078 |
Shared memory multiprocessing system employing mixed broadcast snooping and directory based coherency protocols |
Apr. 18, 2006 |
| 7032079 |
System and method for accelerating read requests within a multiprocessor system |
Apr. 18, 2006 |
| 7028150 |
Arrangement of data within cache lines so that tags are first data received |
Apr. 11, 2006 |
| 7024463 |
Network system, control method, control apparatus, and multiprocessor |
Apr. 4, 2006 |
| 7024520 |
System and method enabling efficient cache line reuse in a computer system |
Apr. 4, 2006 |
| 7024521 |
Managing sparse directory evictions in multiprocessor systems via memory locking |
Apr. 4, 2006 |
| 7020750 |
Hybrid system and method for updating remote cache memory with user defined cache update policies |
Mar. 28, 2006 |
| 7015921 |
Method and apparatus for memory access |
Mar. 21, 2006 |
| 7017008 |
Method and apparatus for optimizing data streaming in a computer system utilizing random access memory in a system logic device |
Mar. 21, 2006 |
| 7017011 |
Coherence controller for a multiprocessor system, module, and multiprocessor system with a multimodule architecture incorporating such a controller |
Mar. 21, 2006 |
| 7017012 |
Distributed storage cache coherency system and method |
Mar. 21, 2006 |
| 7017013 |
Method and system for coherently caching I/O devices across a network |
Mar. 21, 2006 |
| 7007267 |
Transparent shared memory access in a software development system |
Feb. 28, 2006 |
| 7003630 |
Mechanism for proxy management of multiprocessor storage hierarchies |
Feb. 21, 2006 |
| 7003631 |
System having address-based intranode coherency and data-based internode coherency |
Feb. 21, 2006 |
| 7003632 |
Method and apparatus for scalable disambiguated coherence in shared storage hierarchies |
Feb. 21, 2006 |
| 7003633 |
Methods and apparatus for managing probe requests |
Feb. 21, 2006 |
| 7000078 |
System and method for maintaining cache coherency in a shared memory system |
Feb. 14, 2006 |
| 7000079 |
Method and apparatus for verification of coherence for shared cache components in a system verification environment |
Feb. 14, 2006 |
| 6996674 |
Method and apparatus for a global cache directory in a storage cluster |
Feb. 7, 2006 |
| 6996681 |
Modular interconnection architecture for an expandable multiprocessor machine, using a multilevel bus hierarchy and the same building block for all the levels |
Feb. 7, 2006 |
| 6996682 |
System and method for cascading data updates through a virtual copy hierarchy |
Feb. 7, 2006 |
| 6996683 |
Cache coherency in a multi-processor system |
Feb. 7, 2006 |
| 6996693 |
High speed memory cloning facility via a source/destination switching mechanism |
Feb. 7, 2006 |
| 6993631 |
L2 cache maintaining local ownership of remote coherency blocks |
Jan. 31, 2006 |
| 6990555 |
Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.) |
Jan. 24, 2006 |
| 6990559 |
Mechanism for resolving ambiguous invalidates in a computer system |
Jan. 24, 2006 |
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