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Class Information
Number: 711/141
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Coherency
Description: Subject matter further comprising means or steps not specifically covered above for assuring that the data


Sub-classes under this class:

Class Number Class Name Patents
711/145 Access control bit 740
711/144 Cache status data bit 976
711/146 Snooping 718
711/143 Write-back 488
711/142 Write-through 201


Patents under this class:

Patent Number Title Of Patent Date Issued
7120756 Computer system including a promise array Oct. 10, 2006
7120755 Transfer of cache lines on-chip between processing cores in a multi-core system Oct. 10, 2006
7120752 Multi-processor computer system with cache-flushing system using memory recall Oct. 10, 2006
7120651 Maintaining a shared cache that has partitions allocated among multiple nodes and a data-to-partition mapping Oct. 10, 2006
7117310 Systems and methods for cache synchronization between redundant storage controllers Oct. 3, 2006
7114036 Method and apparatus for autonomically moving cache entries to dedicated storage when false cache line sharing is detected Sep. 26, 2006
7111129 Method and system for coherently caching I/O devices across a network Sep. 19, 2006
7111128 Hierarchical virtual model of a cache hierarchy in a multiprocessor system Sep. 19, 2006
7107408 Methods and apparatus for speculative probing with early completion and early request Sep. 12, 2006
7107409 Methods and apparatus for speculative probing at a request cluster Sep. 12, 2006
7107410 Exclusive status tags Sep. 12, 2006
7103636 Methods and apparatus for speculative probing of a remote cluster Sep. 5, 2006
7103725 Methods and apparatus for speculative probing with early completion and delayed request Sep. 5, 2006
7103726 Methods and apparatus for managing probe requests Sep. 5, 2006
7103728 System and method for memory migration in distributed-memory multi-processor systems Sep. 5, 2006
7103752 Method and apparatus for broadcasting messages with set priority to guarantee knowledge of a state within a data processing system Sep. 5, 2006
7099998 Method for reducing an importance level of a cache line Aug. 29, 2006
7093078 Data access method in the network system and the network system Aug. 15, 2006
7093079 Snoop filter bypass Aug. 15, 2006
7093080 Method and apparatus for coherent memory structure of heterogeneous processor systems Aug. 15, 2006
7093081 Method and apparatus for identifying false cache line sharing Aug. 15, 2006
7089361 Dynamic allocation of shared cache directory for optimizing performance Aug. 8, 2006
7089368 Microprocessor apparatus and method for exclusively prefetching a block of cache lines from memory Aug. 8, 2006
7089371 Microprocessor apparatus and method for prefetch, allocation, and initialization of a block of cache lines from memory Aug. 8, 2006
7089376 Reducing snoop response time for snoopers without copies of requested data via snoop filtering Aug. 8, 2006
7089404 Method and apparatus for enhancing scheduling in an advanced microprocessor Aug. 8, 2006
7089408 Re-fetch of long operand buffered remainder after cache line invalidation in out-of-order multiprocessor system without instruction re-execution Aug. 8, 2006
7085896 Method and apparatus which implements a multi-ported LRU in a multiple-clock system Aug. 1, 2006
7085898 Coherency management for a "switchless" distributed shared memory computer system Aug. 1, 2006
7082500 Optimized high bandwidth cache coherence mechanism Jul. 25, 2006
7082501 Remote node accessing local memory by using distributed shared memory Jul. 25, 2006
7080197 System and method of cache management for storage controllers Jul. 18, 2006
7080210 Microprocessor apparatus and method for exclusive prefetch of a cache line from memory Jul. 18, 2006
7080211 Microprocessor apparatus and method for prefetch, allocation, and initialization of a cache line from memory Jul. 18, 2006
7080213 System and method for reducing shared memory write overhead in multiprocessor systems Jul. 18, 2006
7080214 Directory based support for function shipping in a multiprocessor system Jul. 18, 2006
7080215 Multiprocessor system with local memory which mirrors a shaped memory Jul. 18, 2006
7076597 Broadcast invalidate scheme Jul. 11, 2006
7076613 Cache line pre-load and pre-own based on cache coherence speculation Jul. 11, 2006
7076614 System and method for optimizing bus bandwidth utilization by grouping cache write-backs Jul. 11, 2006
7072954 Network management system having access manager for managing access to recording medium apparatus Jul. 4, 2006
7073030 Method and apparatus providing non level one information caching using prefetch to increase a hit ratio Jul. 4, 2006
7073031 Multi-processor system having data coherency Jul. 4, 2006
7069361 System and method of maintaining coherency in a distributed communication system Jun. 27, 2006
7069384 System and method for cache external writing and write shadowing Jun. 27, 2006
7069391 Method for improved first level cache coherency Jun. 27, 2006
7069392 Methods and apparatus for extended packet communications between multiprocessor clusters Jun. 27, 2006
7065614 System and method for maintaining memory coherency within a multi-processor data processing system Jun. 20, 2006
7062608 Storage device adapter equipped with integrated cache Jun. 13, 2006
7062609 Method and apparatus for selecting transfer types Jun. 13, 2006



 
 
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