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Class Information
Number: 711/141
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Coherency
Description: Subject matter further comprising means or steps not specifically covered above for assuring that the data
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7475196 |
Processor, data processing system, and method for initializing a memory block in a data processing system having multiple coherency domains |
Jan. 6, 2009 |
| 7475195 |
Data processing system, cache system and method for actively scrubbing a domain indication |
Jan. 6, 2009 |
| 7472260 |
Early retirement of store operation past exception reporting pipeline stage in strongly ordered processor with load/store queue entry retained until completion |
Dec. 30, 2008 |
| 7472230 |
Preemptive write back controller |
Dec. 30, 2008 |
| 7472229 |
Bus controller initiated write-through mechanism |
Dec. 30, 2008 |
| 7472228 |
Read-copy update method |
Dec. 30, 2008 |
| 7469322 |
Data processing system and method for handling castout collisions |
Dec. 23, 2008 |
| 7469321 |
Software process migration between coherency regions without cache purges |
Dec. 23, 2008 |
| 7469275 |
System having interfaces, switch, and memory bridge for CC-NUMA operation |
Dec. 23, 2008 |
| 7467262 |
Data processing system, cache system and method for scrubbing a domain indication in response to execution of program code |
Dec. 16, 2008 |
| 7464227 |
Method and apparatus for supporting opportunistic sharing in coherent multiprocessors |
Dec. 9, 2008 |
| 7464191 |
System and method for host initialization for an adapter that supports virtualization |
Dec. 9, 2008 |
| 7464115 |
Node synchronization for multi-processor computer systems |
Dec. 9, 2008 |
| 7461212 |
Non-inclusive cache system with simple control operation |
Dec. 2, 2008 |
| 7461209 |
Transient cache storage with discard function for disposable data |
Dec. 2, 2008 |
| 7461206 |
Probabilistic technique for consistency checking cache entries |
Dec. 2, 2008 |
| 7461065 |
Method and system for utilizing shared numeric locks |
Dec. 2, 2008 |
| 7457924 |
Hierarchical directories for cache coherency in a multiprocessor system |
Nov. 25, 2008 |
| 7454687 |
Method and infrastructure for recognition of the resources of a defective hardware unit |
Nov. 18, 2008 |
| 7454581 |
Read-copy update grace period detection without atomic instructions that gracefully handles large numbers of processors |
Nov. 18, 2008 |
| 7454578 |
Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a location of a memory |
Nov. 18, 2008 |
| 7454577 |
Data processing system and method for efficient communication utilizing an Tn and Ten coherency states |
Nov. 18, 2008 |
| 7454576 |
System and method for cache coherency in a cache with different cache location lengths |
Nov. 18, 2008 |
| 7454575 |
Cache memory and its controlling method |
Nov. 18, 2008 |
| 7454570 |
Efficient memory update process for on-the-fly instruction translation for well behaved applications executing on a weakly-ordered processor |
Nov. 18, 2008 |
| 7451277 |
Data processing system, cache system and method for updating an invalid coherency state in response to snooping an operation |
Nov. 11, 2008 |
| 7451248 |
Method and apparatus for invalidating cache lines during direct memory access (DMA) write operations |
Nov. 11, 2008 |
| 7447842 |
Mass memory device and method for operating a mass memory device |
Nov. 4, 2008 |
| 7447794 |
System and method for conveying information |
Nov. 4, 2008 |
| 7447709 |
Methods and apparatus for synchronizing content |
Nov. 4, 2008 |
| 7444494 |
Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a history-based prediction |
Oct. 28, 2008 |
| 7444477 |
System and method for efficiently performing memory intensive computations including a bidirectional synchronization mechanism for maintaining consistency of data |
Oct. 28, 2008 |
| 7444476 |
System and method for code and data security in a semiconductor device |
Oct. 28, 2008 |
| 7437520 |
Adaptive snoop-and-forward mechanisms for multiprocessor systems |
Oct. 14, 2008 |
| 7437519 |
Multithread controller and control method |
Oct. 14, 2008 |
| 7437518 |
Hiding conflict, coherence completion and transaction ID elements of a coherence protocol |
Oct. 14, 2008 |
| 7437517 |
Methods and arrangements to manage on-chip memory to reduce memory latency |
Oct. 14, 2008 |
| 7434008 |
System and method for coherency filtering |
Oct. 7, 2008 |
| 7434006 |
Non-speculative distributed conflict resolution for a cache coherency protocol |
Oct. 7, 2008 |
| 7430642 |
System and method for unified cache access using sequential instruction information |
Sep. 30, 2008 |
| 7430586 |
System and method for managing memory |
Sep. 30, 2008 |
| 7430553 |
Managing states with delta pager |
Sep. 30, 2008 |
| 7428617 |
Cache memory and method to maintain cache-coherence between cache memory units |
Sep. 23, 2008 |
| 7428615 |
System and method for maintaining coherency and tracking validity in a cache hierarchy |
Sep. 23, 2008 |
| 7426627 |
Selective address translation for a resource such as a hardware device |
Sep. 16, 2008 |
| 7426612 |
Methods and apparatus for enforcing instruction-cache coherence |
Sep. 16, 2008 |
| 7424561 |
Systems using mix of packet, coherent, and noncoherent traffic to optimize transmission between systems |
Sep. 9, 2008 |
| 7421549 |
Method and apparatus of remote copy for multiple storage subsystems |
Sep. 2, 2008 |
| 7421542 |
Technique for data cache synchronization |
Sep. 2, 2008 |
| 7421541 |
Version management of cached permissions metadata |
Sep. 2, 2008 |
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