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Class Information
Number: 711/141
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Coherency
Description: Subject matter further comprising means or steps not specifically covered above for assuring that the data
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6941423 |
Non-volatile mass storage cache coherency apparatus |
Sep. 6, 2005 |
| 6941444 |
Branch prediction method and apparatus |
Sep. 6, 2005 |
| 6938127 |
Reconfiguring memory to reduce boot time |
Aug. 30, 2005 |
| 6938128 |
System and method for reducing memory latency during read requests |
Aug. 30, 2005 |
| 6938129 |
Distributed memory module cache |
Aug. 30, 2005 |
| 6938139 |
Method and system for data element change across multiple instances of data base cache |
Aug. 30, 2005 |
| 6934806 |
Method and system for improving input/output performance by proactively flushing and locking an entire page out of caches of a multiprocessor system |
Aug. 23, 2005 |
| 6934813 |
System and method for caching data based on identity of requestor |
Aug. 23, 2005 |
| 6934814 |
Cache coherence directory eviction mechanisms in multiprocessor systems which maintain transaction ordering |
Aug. 23, 2005 |
| 6931430 |
Maintaining coherency in a symbiotic computing system and method of operation thereof |
Aug. 16, 2005 |
| 6931485 |
Disk array apparatus |
Aug. 16, 2005 |
| 6931510 |
Method and system for translation lookaside buffer coherence in multiprocessor systems |
Aug. 16, 2005 |
| 6928519 |
Mechanism for maintaining cache consistency in computer systems |
Aug. 9, 2005 |
| 6928520 |
Memory controller that provides memory line caching and memory transaction coherency by using at least one memory controller agent |
Aug. 9, 2005 |
| 6925536 |
Cache coherence directory eviction mechanisms for unmodified copies of memory lines in multiprocessor systems |
Aug. 2, 2005 |
| 6925537 |
Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participants |
Aug. 2, 2005 |
| 6925634 |
Method for maintaining cache coherency in software in a shared memory system |
Aug. 2, 2005 |
| 6922756 |
Forward state for use in cache coherency in a multiprocessor system |
Jul. 26, 2005 |
| 6920532 |
Cache coherence directory eviction mechanisms for modified copies of memory lines in multiprocessor systems |
Jul. 19, 2005 |
| 6920634 |
Detecting and causing unsafe latent accesses to a resource in multi-threaded programs |
Jul. 19, 2005 |
| 6917967 |
System and method for implementing shared memory regions in distributed shared memory systems |
Jul. 12, 2005 |
| 6918009 |
Cache device and control method for controlling cache memories in a multiprocessor system |
Jul. 12, 2005 |
| 6912612 |
Shared bypass bus structure |
Jun. 28, 2005 |
| 6912624 |
Method and system for exclusive two-level caching in a chip-multiprocessor |
Jun. 28, 2005 |
| 6910099 |
Disk drive adjusting read-ahead to optimize cache memory allocation |
Jun. 21, 2005 |
| 6910107 |
Method and apparatus for invalidation of data in computer systems |
Jun. 21, 2005 |
| 6910108 |
Hardware support for partitioning a multiprocessor system to allow distinct operating systems |
Jun. 21, 2005 |
| 6904499 |
Controlling cache memory in external chipset using processor |
Jun. 7, 2005 |
| 6901485 |
Memory directory management in a multi-node computer system |
May. 31, 2005 |
| 6898666 |
Multiple memory system support through segment assignment |
May. 24, 2005 |
| 6898675 |
Data received before coherency window for a snoopy bus |
May. 24, 2005 |
| 6898676 |
Computer system supporting both dirty-shared and non-dirty-shared data processing entities |
May. 24, 2005 |
| 6898687 |
System and method for synchronizing access to shared resources |
May. 24, 2005 |
| 6895416 |
Checkpointing filesystem |
May. 17, 2005 |
| 6895471 |
Method and apparatus for synchronizing cache with target tables in a data warehousing system |
May. 17, 2005 |
| 6895476 |
Retry-based late race resolution mechanism for a computer system |
May. 17, 2005 |
| 6892286 |
Shared memory multiprocessor memory model verification system and method |
May. 10, 2005 |
| 6889288 |
Reducing data copy operations for writing data from a network to storage of a cached data storage system by organizing cache blocks as linked lists of data fragments |
May. 3, 2005 |
| 6886079 |
Dynamic history based mechanism for the granting of exclusive data ownership in a non-uniform memory access (NUMA) computer system |
Apr. 26, 2005 |
| 6883070 |
Bandwidth-adaptive, hybrid, cache-coherence protocol |
Apr. 19, 2005 |
| 6883071 |
Method for evaluation of scalable symmetric multiple processor cache coherency protocols and algorithms |
Apr. 19, 2005 |
| 6880071 |
Selective signalling of later reserve location memory fault in compound compare and swap |
Apr. 12, 2005 |
| 6877030 |
Method and system for cache coherence in DSM multiprocessor system without growth of the sharing vector |
Apr. 5, 2005 |
| 6877067 |
Shared cache memory replacement control method and apparatus |
Apr. 5, 2005 |
| 6874053 |
Shared memory multiprocessor performing cache coherence control and node controller therefor |
Mar. 29, 2005 |
| 6874065 |
Cache-flushing engine for distributed shared memory multi-processor computer systems |
Mar. 29, 2005 |
| 6871102 |
Apparatus and method for verifying memory coherency of duplication processor |
Mar. 22, 2005 |
| 6871259 |
File system including non-volatile semiconductor memory device having a plurality of banks |
Mar. 22, 2005 |
| 6871267 |
Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency |
Mar. 22, 2005 |
| 6871268 |
Methods and systems for distributed caching in presence of updates and in accordance with holding times |
Mar. 22, 2005 |
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