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Class Information
Number: 711/129
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Partitioned cache
Description: Subject matter further comprising means or steps for dividing the cache into independent sections or domains.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7627714 |
Apparatus, system, and method for preventing write starvation in a partitioned cache of a storage controller |
Dec. 1, 2009 |
| 7627718 |
Frozen ring cache |
Dec. 1, 2009 |
| 7624235 |
Cache used both as cache and staging buffer |
Nov. 24, 2009 |
| 7606977 |
Context save and restore with a stack-based memory structure |
Oct. 20, 2009 |
| 7596664 |
Collapsed distributed cooperative memory for interactive and scalable media-on-demand systems |
Sep. 29, 2009 |
| 7596665 |
Mechanism for a processor to use locking cache as part of system memory |
Sep. 29, 2009 |
| 7590802 |
Direct deposit using locking cache |
Sep. 15, 2009 |
| 7584327 |
Method and system for proximity caching in a multiple-core system |
Sep. 1, 2009 |
| 7581066 |
Cache isolation model |
Aug. 25, 2009 |
| 7577854 |
Information storage device having a divided area in memory area |
Aug. 18, 2009 |
| 7565490 |
Out of order graphics L2 cache |
Jul. 21, 2009 |
| 7565492 |
Method and apparatus for preventing software side channel attacks |
Jul. 21, 2009 |
| 7562190 |
Cache protocol enhancements in a proximity communication-based off-chip cache memory architecture |
Jul. 14, 2009 |
| 7558919 |
Dynamic cache partitioning |
Jul. 7, 2009 |
| 7558937 |
Disk array device memory having areas dynamically adjustable in size |
Jul. 7, 2009 |
| 7555611 |
Memory management of local variables upon a change of context |
Jun. 30, 2009 |
| 7552284 |
Least frequently used eviction implementation |
Jun. 23, 2009 |
| 7549022 |
Avoiding cache line sharing in virtual machines |
Jun. 16, 2009 |
| 7546422 |
Method and apparatus for the synchronization of distributed caches |
Jun. 9, 2009 |
| 7546426 |
Storage having a logical partitioning capability and systems which include the storage |
Jun. 9, 2009 |
| 7543042 |
Remote access method for accessing dynacache data |
Jun. 2, 2009 |
| 7539820 |
Disk device and control method for cache |
May. 26, 2009 |
| 7536692 |
Thread-based engine cache partitioning |
May. 19, 2009 |
| 7536510 |
Hierarchical MRU policy for data cache |
May. 19, 2009 |
| 7529891 |
Balanced prefetching exploiting structured data |
May. 5, 2009 |
| 7526608 |
Methods and apparatus for providing a software implemented cache memory |
Apr. 28, 2009 |
| 7523262 |
Apparatus and method for providing global session persistence |
Apr. 21, 2009 |
| 7512951 |
Method and apparatus for time-sliced and multi-threaded data processing in a communication system |
Mar. 31, 2009 |
| 7509440 |
Programmable controller and communication unit therefor |
Mar. 24, 2009 |
| 7500058 |
Cache memory managing method for computer system |
Mar. 3, 2009 |
| 7493607 |
Statically speculative compilation and execution |
Feb. 17, 2009 |
| 7490200 |
L2 cache controller with slice directory and unified cache structure |
Feb. 10, 2009 |
| 7484043 |
Multiprocessor system with dynamic cache coherency regions |
Jan. 27, 2009 |
| 7484047 |
Apparatus and method for composing a cache memory of a wireless terminal having a coprocessor |
Jan. 27, 2009 |
| 7478218 |
Adaptive cache sizing based on monitoring of regenerated and replaced cache entries |
Jan. 13, 2009 |
| 7475194 |
Apparatus for aging data in a cache |
Jan. 6, 2009 |
| 7475190 |
Direct access of cache lock set data without backing memory |
Jan. 6, 2009 |
| 7469318 |
System bus structure for large L2 cache array topology with different latency domains |
Dec. 23, 2008 |
| 7467280 |
Method for reconfiguring cache memory based on at least analysis of heat generated during runtime, at least by associating an access bit with a cache line and associating a granularity bit wit |
Dec. 16, 2008 |
| 7464223 |
Storage system including storage adapters, a monitoring computer and external storage |
Dec. 9, 2008 |
| 7457922 |
Cache line placement prediction for multiprocessor non-uniform cache architecture systems |
Nov. 25, 2008 |
| 7454571 |
Heuristic cache tuning |
Nov. 18, 2008 |
| 7454580 |
Data processing system, processor and method of data processing that reduce store queue entry utilization for synchronizing operations |
Nov. 18, 2008 |
| 7451248 |
Method and apparatus for invalidating cache lines during direct memory access (DMA) write operations |
Nov. 11, 2008 |
| 7447843 |
Storage system with independently adjustable cache memory partitions |
Nov. 4, 2008 |
| 7444475 |
Semiconductor integrated circuit |
Oct. 28, 2008 |
| 7437514 |
Cache system |
Oct. 14, 2008 |
| 7437512 |
Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions |
Oct. 14, 2008 |
| 7437513 |
Cache memory with the number of operated ways being changed according to access pattern |
Oct. 14, 2008 |
| 7434001 |
Method of accessing cache memory for parallel processing processors |
Oct. 7, 2008 |
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