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Class Information
Number: 711/122
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Multiple caches > Hierarchical caches
Description: Subject matter further comprising means or steps for caching at a plurality of different hierarchical levels (e.g., main cache coupled to an on-chip cache).










Patents under this class:
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Patent Number Title Of Patent Date Issued
8713256 Method, apparatus, and system for energy efficiency and energy conservation including dynamic cache sizing and cache operating voltage management for optimal power performance Apr. 29, 2014
8706970 Dynamic cache queue allocation based on destination availability Apr. 22, 2014
8706968 Apparatus, system, and method for redundant write caching Apr. 22, 2014
8706969 Variable line size prefetcher for multiple memory requestors Apr. 22, 2014
8694730 Binary tree based multilevel cache system for multicore processors Apr. 8, 2014
8688913 Management of partial data segments in dual cache systems Apr. 1, 2014
8688914 Promotion of partial data segments in flash cache Apr. 1, 2014
8688915 Weighted history allocation predictor algorithm in a hybrid cache Apr. 1, 2014
8683140 Cache-based speculation of stores following synchronizing operations Mar. 25, 2014
8683129 Using speculative cache requests to reduce cache miss delays Mar. 25, 2014
8683002 Content delivery network cache grouping Mar. 25, 2014
8683128 Memory bus write prioritization Mar. 25, 2014
8671232 System and method for dynamically migrating stash transactions Mar. 11, 2014
8667221 Detection of streaming data in cache Mar. 4, 2014
8667222 Bypass and insertion algorithms for exclusive last-level caches Mar. 4, 2014
8661199 Efficient level two memory banking to improve performance for multiple source traffic and enable deeper pipelining of accesses by reducing bank stalls Feb. 25, 2014
8656105 Optimizing tag forwarding in a two level cache system from level one to lever two controllers for cache coherence protocol for direct memory access transfers Feb. 18, 2014
8650266 Cache validation using smart source selection in a data network Feb. 11, 2014
8645627 Memory bus write prioritization Feb. 4, 2014
8645631 Combined L2 cache and L1D cache prefetcher Feb. 4, 2014
8639885 Reducing implementation costs of communicating cache invalidation information in a multicore processor Jan. 28, 2014
8627130 Power saving archive system Jan. 7, 2014
8627009 Cache filtering method and apparatus Jan. 7, 2014
8621151 Active memory processor system Dec. 31, 2013
8619766 Method and apparatus for classifying packets Dec. 31, 2013
8615634 Coordinated writeback of dirty cachelines Dec. 24, 2013
8615633 Multi-core processor cache coherence for reduced off-chip traffic Dec. 24, 2013
8612687 Latency-tolerant 3D on-chip memory organization Dec. 17, 2013
8612686 Resource pool managing system and signal processing method Dec. 17, 2013
8606996 Cache optimization Dec. 10, 2013
8606997 Cache hierarchy with bounds on levels accessed Dec. 10, 2013
8595420 Method for dispatching and transmitting data streams between host system and memory storage apparatus having non-volatile memory and smart card chip, memory controller, and memory storage appa Nov. 26, 2013
8595439 Optimization of cache configuration for application design Nov. 26, 2013
8595437 Compression status bit cache with deterministic isochronous latency Nov. 26, 2013
8583870 Stacked memory devices, systems, and methods Nov. 12, 2013
8572322 Asynchronously scheduling memory access requests Oct. 29, 2013
8572323 Cache result register for quick cache information lookup Oct. 29, 2013
8566522 System and method for managing a cache using file system metadata Oct. 22, 2013
8554999 Methods for providing a response and systems thereof Oct. 8, 2013
8549227 Multiprocessor system and operating method of multiprocessor system Oct. 1, 2013
8549226 Providing an alternative caching scheme at the storage area network level Oct. 1, 2013
8549225 Secondary cache for write accumulation and coalescing Oct. 1, 2013
8549255 Microprocessor, method and computer program product for direct page prefetch in millicode capable computer system Oct. 1, 2013
8543702 Managing resources using resource expiration data Sep. 24, 2013
8543768 Memory system including a spiral cache Sep. 24, 2013
8543765 Efficient data prefetching in the presence of load hits Sep. 24, 2013
8539156 Storage subsystem and its logical unit processing method Sep. 17, 2013
8533392 Cache hit management Sep. 10, 2013
8533395 Moveable locked lines in a multi-level cache Sep. 10, 2013
8527727 Semiconductor storage device, with organizing-state notify processing Sep. 3, 2013

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