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Class Information
Number: 711/119
Name: Electrical computers and digital processing systems: memory > Storage accessing and control > Hierarchical memories > Caching > Multiple caches
Description: Subject matter employing plural cache memories
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620776 |
Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of modified memory blocks |
Nov. 17, 2009 |
| 7613884 |
Multiprocessor system and method ensuring coherency between a main memory and a cache memory |
Nov. 3, 2009 |
| 7613886 |
Methods and apparatus for synchronizing data access to a local memory in a multi-processor system |
Nov. 3, 2009 |
| 7606249 |
Methods and systems for caching packets to be written to or read from packet memory |
Oct. 20, 2009 |
| 7600080 |
Avoiding deadlocks in a multiprocessor system |
Oct. 6, 2009 |
| 7589738 |
Cache memory management system and method |
Sep. 15, 2009 |
| 7584329 |
Data processing system and method for efficient communication utilizing an Ig coherency state |
Sep. 1, 2009 |
| 7581064 |
Utilizing cache information to manage memory access and cache utilization |
Aug. 25, 2009 |
| 7577795 |
Disowning cache entries on aging out of the entry |
Aug. 18, 2009 |
| 7577059 |
Decoding control with address transition detection in page erase function |
Aug. 18, 2009 |
| 7577690 |
Managing checkpoint queues in a multiple node system |
Aug. 18, 2009 |
| 7574572 |
Cache memory, system, and method of storing data |
Aug. 11, 2009 |
| 7574562 |
Latency-aware thread scheduling in non-uniform cache architecture systems |
Aug. 11, 2009 |
| 7571283 |
Mechanism in a multi-threaded microprocessor to maintain best case demand instruction redispatch |
Aug. 4, 2009 |
| 7565399 |
Caching web objects transformed by a pipeline of adaptation services |
Jul. 21, 2009 |
| 7562190 |
Cache protocol enhancements in a proximity communication-based off-chip cache memory architecture |
Jul. 14, 2009 |
| 7552282 |
Method, computer readable medium, and data storage system for selective data replication of cached data |
Jun. 23, 2009 |
| 7549021 |
Enhanced data integrity using parallel volatile and non-volatile transfer buffers |
Jun. 16, 2009 |
| 7546353 |
Managed peer-to-peer applications, systems and methods for distributed data access and storage |
Jun. 9, 2009 |
| 7543042 |
Remote access method for accessing dynacache data |
Jun. 2, 2009 |
| 7543123 |
Multistage virtual memory paging system |
Jun. 2, 2009 |
| 7539819 |
Cache operations with hierarchy control |
May. 26, 2009 |
| 7536421 |
Intelligent client architecture computer system and method |
May. 19, 2009 |
| 7536510 |
Hierarchical MRU policy for data cache |
May. 19, 2009 |
| 7536692 |
Thread-based engine cache partitioning |
May. 19, 2009 |
| 7529139 |
N-port memory circuits allowing M memory addresses to be accessed concurrently and signal processing methods thereof |
May. 5, 2009 |
| 7529799 |
Method and apparatus for transaction tag assignment and maintenance in a distributed symmetric multiprocessor system |
May. 5, 2009 |
| 7529889 |
Data processing apparatus and method for performing a cache lookup in an energy efficient manner |
May. 5, 2009 |
| 7523265 |
Systems and arrangements for promoting a line to exclusive in a fill buffer of a cache |
Apr. 21, 2009 |
| 7519774 |
Data processor having a memory control unit with cache memory |
Apr. 14, 2009 |
| 7512738 |
Allocating call stack frame entries at different memory levels to functions in a program |
Mar. 31, 2009 |
| 7509457 |
Non-homogeneous multi-processor system with shared memory |
Mar. 24, 2009 |
| 7502775 |
Providing cost model data for tuning of query cache memory in databases |
Mar. 10, 2009 |
| 7500065 |
Data processing system and method for efficient L3 cache directory management |
Mar. 3, 2009 |
| 7496726 |
Controlling contention via transactional timers among conflicting transactions issued by processors operating in insistent or polite mode |
Feb. 24, 2009 |
| 7496712 |
Proximity communication-based off-chip cache memory architectures |
Feb. 24, 2009 |
| 7484062 |
Cache injection semi-synchronous memory copy operation |
Jan. 27, 2009 |
| 7480759 |
System, method and storage medium for providing data caching and data compression in a memory subsystem |
Jan. 20, 2009 |
| 7480772 |
Data processing system and method for efficient communication utilizing an Tn and Ten coherency states |
Jan. 20, 2009 |
| 7480731 |
Data transfer scheme using caching technique for reducing network load |
Jan. 20, 2009 |
| 7478203 |
Technique for eliminating dead stores in a processor |
Jan. 13, 2009 |
| 7478202 |
Using the message fabric to maintain cache coherency of local caches of global memory |
Jan. 13, 2009 |
| 7475196 |
Processor, data processing system, and method for initializing a memory block in a data processing system having multiple coherency domains |
Jan. 6, 2009 |
| 7472219 |
Data-storage apparatus, data-storage method and recording/reproducing system |
Dec. 30, 2008 |
| 7472224 |
Reconfigurable processing node including first and second processor cores |
Dec. 30, 2008 |
| 7469322 |
Data processing system and method for handling castout collisions |
Dec. 23, 2008 |
| 7469318 |
System bus structure for large L2 cache array topology with different latency domains |
Dec. 23, 2008 |
| 7464223 |
Storage system including storage adapters, a monitoring computer and external storage |
Dec. 9, 2008 |
| 7461207 |
Methods and apparatus for controlling hierarchical cache memory |
Dec. 2, 2008 |
| 7454585 |
Efficient and flexible memory copy operation |
Nov. 18, 2008 |
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