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Class Information
Number: 711/100
Name: Electrical computers and digital processing systems: memory > Storage accessing and control
Description: Subject matter comprising means (e.g., a processor


Sub-classes under this class:

Class Number Class Name Patents
711/167 Access timing 1,323
711/154 Control technique 2,147
711/117 Hierarchical memories 422
711/170 Memory configuring 1,855
711/147 Shared memory area 1,121
711/101 Specific memory composition 242


Patents under this class:
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Patent Number Title Of Patent Date Issued
6055600 Method and apparatus for detecting the presence and identification of level two cache modules Apr. 25, 2000
6055601 Data receiving apparatus capable of writing only necessary data in a file at the time of data reception Apr. 25, 2000
6055633 Method of reprogramming memories in field devices over a multidrop network Apr. 25, 2000
6052755 Programming circuits and techniques for programmable logic Apr. 18, 2000
6049802 System and method for generating a linked list in a computer memory Apr. 11, 2000
6049848 System and method for performing high-speed tape positioning operations Apr. 11, 2000
6047125 Garbage collection system for improved use of memory by removal of reference conflicts Apr. 4, 2000
6047344 Semiconductor memory device with multiplied internal clock Apr. 4, 2000
6044416 Configurable first-in first-out memory interface Mar. 28, 2000
6044442 External partitioning of an automated data storage library into multiple virtual libraries for access by a plurality of hosts Mar. 28, 2000
6044443 Portable computer with memory management system and method for prolonging the lifetime of internal battery Mar. 28, 2000
6039765 Computer instruction which generates multiple results of different data types to improve software emulation Mar. 21, 2000
6041387 Apparatus for read/write-access to registers having register file architecture in a central processing unit Mar. 21, 2000
6041388 Circuit and method for controlling memory depth Mar. 21, 2000
6038630 Shared access control device for integrated system with multiple functional units accessing external structures over multiple data buses Mar. 14, 2000
6038637 Universal DRAM address multiplexer Mar. 14, 2000
6035367 Computer file system providing looped file structure for post-occurrence data collection of asynchronous events Mar. 7, 2000
6029226 Method and apparatus having automated write data transfer with optional skip by processing two write commands as a single write command Feb. 22, 2000
6029234 Output synchronization method and apparatus in a memory system utilizing small buffer size Feb. 22, 2000
6026448 Method and means for exchanging messages, responses and data between different computer systems that require a plurality of communication paths between them Feb. 15, 2000
6023583 Optimized variable allocation method, optimized variable allocation system and computer-readable memory containing an optimized variable allocation program Feb. 8, 2000
6023705 Multiple CD index and loading system and method Feb. 8, 2000
6021460 Protect circuit of register Feb. 1, 2000
6018787 System for generating chip select signals based on coded and uncoded address signals Jan. 25, 2000
6016369 Image generation method and apparatus Jan. 18, 2000
6016547 Data processing apparatus with program allocating section for selectively allocating programs in first and second memory Jan. 18, 2000
6009508 System and method for addressing plurality of data values with a single address in a multi-value store on FIFO basis Dec. 28, 1999
6003110 Method and apparatus for converting memory addresses into memory selection signals Dec. 14, 1999
6003112 Memory controller and method for clearing or copying memory utilizing register files to store address information Dec. 14, 1999
5996041 Integrated circuit memory devices having page flag cells which indicate the true or non-true state of page data therein and methods of operating the same Nov. 30, 1999
5996098 Memory tester Nov. 30, 1999
5991851 Enhanced signal processing random access memory device utilizing a DRAM memory array integrated with an associated SRAM cache and internal refresh control Nov. 23, 1999
5987544 System interface protocol with optional module cache Nov. 16, 1999
5987564 Associative memory device Nov. 16, 1999
5987576 Method and apparatus for generating and distributing clock signals with minimal skew Nov. 16, 1999
5987627 Methods and apparatus for high-speed mass storage access in a computer system Nov. 16, 1999
5983320 Method and apparatus for externally configuring and modifying the transaction request response characteristics of a semiconductor device coupled to a bus Nov. 9, 1999
5978884 Semiconductor memory device having a single line data bus and latch circuits for improved pipeline operations Nov. 2, 1999
5978890 External storage control device and data transfer method between external storage control devices Nov. 2, 1999
5972693 Apparatus for identifying, classifying, or quantifying DNA sequences in a sample without sequencing Oct. 26, 1999
5974402 Address decoder with memory wait state circuit Oct. 26, 1999
5974536 Method, system and computer program product for profiling thread virtual memory accesses Oct. 26, 1999
5964895 VRAM-based parity engine for use in disk array controller Oct. 12, 1999
5966514 Microprocessor for supporting reduction of program codes in size Oct. 12, 1999
5966722 Method and apparatus for controlling multiple dice with a single die Oct. 12, 1999
5961617 System and technique for reducing power consumed by a data transfer operations during periods of update inactivity Oct. 5, 1999
5958038 Computer processor with two addressable memories and two stream registers and method of data streaming of ALU operation Sep. 28, 1999
5958066 On-line scanning and maintenance of a disk drive array Sep. 28, 1999
5960460 Non-intrusive replication of hard disk Sep. 28, 1999
5953215 Apparatus and method for improving computer memory speed and capacity Sep. 14, 1999

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