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Class Information
Number: 710/58
Name: Electrical computers and digital data processing systems: input/output > Input/output data processing > Input/output process timing
Description: Subject matter further comprising means or steps for regulating when functions are performed in order to transfer data between the peripheral and digital data processing system or computer.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7617339 |
Serial interface circuit for data transfer |
Nov. 10, 2009 |
| 7617386 |
Scheduling thread upon ready signal set when port transfers data on trigger time activation |
Nov. 10, 2009 |
| 7610427 |
Functional module card for transferring digital broadcasting signal using a clock generated based on a synchronous signal extracted from a received data signal |
Oct. 27, 2009 |
| 7606952 |
Method for operating serial flash memory |
Oct. 20, 2009 |
| 7606955 |
Single wire bus for connecting devices and methods of operating the same |
Oct. 20, 2009 |
| 7603673 |
Method and system for reducing context switch times |
Oct. 13, 2009 |
| 7600049 |
Method, system, and computer program product for timing operations of different durations in a multi-processor, multi-control block environment |
Oct. 6, 2009 |
| 7600053 |
Emulation of extended input/output measurement block facilities |
Oct. 6, 2009 |
| 7596644 |
Transmit rate pacing system and method |
Sep. 29, 2009 |
| 7590789 |
Optimizing clock crossing and data path latency |
Sep. 15, 2009 |
| 7587255 |
Software and process for play-cursor calculation |
Sep. 8, 2009 |
| 7587533 |
Digital programming interface between a baseband processor and an integrated radio-frequency module |
Sep. 8, 2009 |
| 7567514 |
RAID apparatus, and communication-connection monitoring method and program |
Jul. 28, 2009 |
| 7565472 |
Host based automatic detection unit |
Jul. 21, 2009 |
| 7565465 |
Pushback FIFO |
Jul. 21, 2009 |
| 7562185 |
Accessing a storage medium using dynamic read statistics |
Jul. 14, 2009 |
| 7555586 |
Apparatus and method for packet based storage virtualization |
Jun. 30, 2009 |
| 7552254 |
Associating address space identifiers with active contexts |
Jun. 23, 2009 |
| 7552255 |
Dynamically partitioning pipeline resources |
Jun. 23, 2009 |
| 7548994 |
Disk initiated asynchronous event notification in an information handling system |
Jun. 16, 2009 |
| 7548998 |
Modifying host input/output (I/O) activity to allow a storage drive to which I/O activity is directed to access requested information |
Jun. 16, 2009 |
| 7539793 |
Synchronized multichannel universal serial bus |
May. 26, 2009 |
| 7536489 |
Information processing system for determining payload size based on packet-to-payload size ratio |
May. 19, 2009 |
| 7533238 |
Method for limiting the size of a local storage of a processor |
May. 12, 2009 |
| 7516247 |
Avoiding silent data corruption and data leakage in a virtual environment with multiple guests |
Apr. 7, 2009 |
| 7516248 |
Obtaining extended queue measurement data for a range of logical control unit queues |
Apr. 7, 2009 |
| 7512725 |
Generating a data stream from cartridge controllers using a plurality of measurement cartridges |
Mar. 31, 2009 |
| 7512766 |
Controlling preemptive work balancing in data storage |
Mar. 31, 2009 |
| 7509445 |
Adapting a plurality of measurement cartridges using cartridge controllers |
Mar. 24, 2009 |
| 7506218 |
Timeout request scheduling using grouping and nonsynchronized processing to enhance performance |
Mar. 17, 2009 |
| 7502871 |
Method for query/modification of linear block address table entries for direct I/O |
Mar. 10, 2009 |
| 7500031 |
Ring-based cache coherent bus |
Mar. 3, 2009 |
| 7500042 |
Access control device for bus bridge circuit and method for controlling the same |
Mar. 3, 2009 |
| 7490178 |
Threshold on unblocking a processing node that is blocked due data packet passing |
Feb. 10, 2009 |
| 7484214 |
Real time control system |
Jan. 27, 2009 |
| 7484023 |
Computer system apparatus for stabilizing asynchronous interfaces |
Jan. 27, 2009 |
| 7480765 |
Storage unit and circuit for shaping communication signal |
Jan. 20, 2009 |
| 7480846 |
Iterative turbo decoder with single memory |
Jan. 20, 2009 |
| 7466608 |
Data input/output circuit having data inversion determination function and semiconductor memory device having the same |
Dec. 16, 2008 |
| 7467263 |
Storage system, management apparatus & method for determining a performance problem using past & current performance values of the resources |
Dec. 16, 2008 |
| 7464284 |
Systems and methods for driving data over a bus where the systems employ a bus clock that is derived from a system clock and a data clock designed to lead the bus clock |
Dec. 9, 2008 |
| 7461186 |
Data handover unit for transferring data between different clock domains by parallelly reading out data bits from a plurality of storage elements |
Dec. 2, 2008 |
| 7454538 |
Latency insensitive FIFO signaling protocol |
Nov. 18, 2008 |
| 7454539 |
Method for transferring variable isochronous data and apparatus therefore |
Nov. 18, 2008 |
| 7454589 |
Data buffer circuit, interface circuit and control method therefor |
Nov. 18, 2008 |
| 7451246 |
Indirectly controlling a target device on a network |
Nov. 11, 2008 |
| 7451070 |
Optimal bus operation performance in a logic simulation environment |
Nov. 11, 2008 |
| 7447805 |
Buffer chip and method for controlling one or more memory arrangements |
Nov. 4, 2008 |
| 7421692 |
Real time control system |
Sep. 2, 2008 |
| 7409471 |
Data transfer control device for data transfer over a bus, electronic equipment and method for data transfer over a bus |
Aug. 5, 2008 |
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