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Class Information
Number: 710/51
Name: Electrical computers and digital data processing systems: input/output > Input/output data processing > Input/output access regulation > Accessing via a multiplexer
Description: Subject matter further comprising means or steps for employing a concentrator to regulate the access of a plurality of the peripherals, or digital data processing systems or computers.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7627701 |
Indicating last data buffer by last bit flag bit |
Dec. 1, 2009 |
| 7624206 |
RAID data storage system with SAS expansion |
Nov. 24, 2009 |
| 7603498 |
System and method for managing multiple information handling systems using embedded control logic |
Oct. 13, 2009 |
| 7590776 |
Data storage techniques utilizing host-side multiplexers |
Sep. 15, 2009 |
| 7574542 |
SAS expansion topology for RAID data storage including multiplexers and SAS expanders for interfacing with single or dual ports drives |
Aug. 11, 2009 |
| 7571271 |
Lane merging |
Aug. 4, 2009 |
| 7509444 |
Data access device for working with a computer of power off status |
Mar. 24, 2009 |
| 7493421 |
Media sharing apparatus, system, and method for enabling computing devices to share a drive |
Feb. 17, 2009 |
| 7472210 |
Multiplexing and bypass circuit for interfacing either single or dual ported drives to multiple storage processors |
Dec. 30, 2008 |
| 7469307 |
Storage system with DMA controller which controls multiplex communication protocol |
Dec. 23, 2008 |
| 7461186 |
Data handover unit for transferring data between different clock domains by parallelly reading out data bits from a plurality of storage elements |
Dec. 2, 2008 |
| 7454535 |
Bidirectional data repeater switch |
Nov. 18, 2008 |
| 7437491 |
Clock and data recovery wherein an FB-DIMM is connected to signal path and null and sync frames control the FB-DIMM |
Oct. 14, 2008 |
| 7412546 |
System method structure in network processor that indicates last data buffer of frame packet by last flag bit that is either in first or second position |
Aug. 12, 2008 |
| 7398334 |
Circuit for and method of realigning data |
Jul. 8, 2008 |
| 7376956 |
System for performing multiple functions in parallel time |
May. 20, 2008 |
| RE40317 |
System for receiving a control signal from a device for selecting its associated clock signal for controlling the transferring of information via a buffer |
May. 13, 2008 |
| 7368939 |
Data input/output circuit included in semiconductor memory device |
May. 6, 2008 |
| 7352372 |
Indirect addressing mode for display controller |
Apr. 1, 2008 |
| 7333580 |
Pipelined parallel processing of feedback loops in a digital circuit |
Feb. 19, 2008 |
| 7281066 |
Memory access system including support for multiple bus widths |
Oct. 9, 2007 |
| 7254653 |
Switch control system and method that distinguishes between a plurality of real and emulated input devices |
Aug. 7, 2007 |
| 7254647 |
Network for decreasing transmit link layer core speed |
Aug. 7, 2007 |
| 7251280 |
Circuit structure and signal encoding method for a serial ATA external physical layer |
Jul. 31, 2007 |
| 7249167 |
Intelligent modular server management system for selectively operating a plurality of computers |
Jul. 24, 2007 |
| 7219171 |
Flow control for digital signal processing to support data stream operations |
May. 15, 2007 |
| 7200696 |
System method structure in network processor that indicates last data buffer of frame packet by last flag bit that is either in first or second position |
Apr. 3, 2007 |
| 7200691 |
System and method for efficient DMA transfer and buffering of captured data events from a nondeterministic data bus |
Apr. 3, 2007 |
| 7191257 |
System and method for real-time processing of nondeterministic captured data events |
Mar. 13, 2007 |
| 7185125 |
Device for transferring data via write or read pointers between two asynchronous subsystems having a buffer memory and plurality of shadow registers |
Feb. 27, 2007 |
| 7143216 |
System for configuring expandable buses in a multi-device storage container and related method |
Nov. 28, 2006 |
| 7143226 |
Method and apparatus for multiplexing commands in a symmetric multiprocessing system interchip link |
Nov. 28, 2006 |
| 7124213 |
Device having spare I/O and method of using a device having spare I/O |
Oct. 17, 2006 |
| 7085861 |
Serial ATA control circuit for automatically switching connection path |
Aug. 1, 2006 |
| 7085858 |
Configuration in a configurable system on a chip |
Aug. 1, 2006 |
| 7080190 |
Apparatus and method for providing transparent sharing of channel resources by multiple host machines |
Jul. 18, 2006 |
| 7069363 |
On-chip bus |
Jun. 27, 2006 |
| 7016988 |
Output buffer register, electronic circuit and method for delivering signals using same |
Mar. 21, 2006 |
| 7000059 |
Integrated PCI interface card and bus system thereof |
Feb. 14, 2006 |
| 6988268 |
IO completion architecture for user-mode networking |
Jan. 17, 2006 |
| 6970967 |
Crossbar circuit having a plurality of repeaters forming different repeater arrangements |
Nov. 29, 2005 |
| 6968418 |
Data forwarding by host/PCI-X bridges with buffered packet size determined using system information |
Nov. 22, 2005 |
| 6961792 |
System for configuring expandable buses in a multi-device storage container and related method |
Nov. 1, 2005 |
| 6948023 |
Transmission interface conversion device |
Sep. 20, 2005 |
| 6924746 |
Device and method to establish temporal correspondence in multiple sensor configurations |
Aug. 2, 2005 |
| 6920510 |
Time sharing a single port memory among a plurality of ports |
Jul. 19, 2005 |
| 6915367 |
Shared peripheral architecture |
Jul. 5, 2005 |
| 6907479 |
Integrated circuit FIFO memory devices that are divisible into independent FIFO queues, and systems and methods for controlling same |
Jun. 14, 2005 |
| 6900906 |
Apparatus, method and computer readable recording medium for processing image information |
May. 31, 2005 |
| 6826637 |
Implementing for buffering devices in circuit layout to ensure same arriving time for clock signal from source root to output bonding pads |
Nov. 30, 2004 |
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