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Class Information
Number: 710/50
Name: Electrical computers and digital data processing systems: input/output > Input/output data processing > Input/output access regulation > Input/output interrupting > Vectored
Description: Subject matter further comprising means or steps wherein the interrupting peripherals supply, along with the access requests, data identifying locations of routines for servicing the access requests.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620751 |
Command scheduling and affiliation management for serial attached storage devices |
Nov. 17, 2009 |
| 7590778 |
Using operation codes to control a decoder's use of a buffer to generate data from an input data stream into an output data stream |
Sep. 15, 2009 |
| 7558888 |
Enhanced access to hidden data storage |
Jul. 7, 2009 |
| 7349999 |
Method, system, and program for managing data read operations on network controller with offloading functions |
Mar. 25, 2008 |
| 7243178 |
Enable/disable claiming of a DMA request interrupt |
Jul. 10, 2007 |
| 7213084 |
System and method for allocating memory allocation bandwidth by assigning fixed priority of access to DMA machines and programmable priority to processing unit |
May. 1, 2007 |
| 7197625 |
Alignment and ordering of vector elements for single instruction multiple data processing |
Mar. 27, 2007 |
| 7185125 |
Device for transferring data via write or read pointers between two asynchronous subsystems having a buffer memory and plurality of shadow registers |
Feb. 27, 2007 |
| 7013305 |
Managing the state of coupling facility structures, detecting by one or more systems coupled to the coupling facility, the suspended state of the duplexed command, detecting being independent |
Mar. 14, 2006 |
| 6963934 |
Hibernation of computer systems |
Nov. 8, 2005 |
| 6959346 |
Method and system for packet encryption |
Oct. 25, 2005 |
| 6883037 |
Fast data decoder that operates with reduced output buffer bounds checking |
Apr. 19, 2005 |
| 6779060 |
Multimodal user interface |
Aug. 17, 2004 |
| 6748460 |
Initiative passing in an I/O operation without the overhead of an interrupt |
Jun. 8, 2004 |
| 6697959 |
Fault handling in a data processing system utilizing a fault vector pointer table |
Feb. 24, 2004 |
| 6665816 |
Data shift register |
Dec. 16, 2003 |
| 6601122 |
Exceptions and interrupts with dynamic priority and vector routing |
Jul. 29, 2003 |
| 6401194 |
Execution unit for processing a data stream independently and in parallel |
Jun. 4, 2002 |
| 6356970 |
Interrupt request control module with a DSP interrupt vector generator |
Mar. 12, 2002 |
| 6324600 |
System for controlling movement of data in virtual environment using queued direct input/output device and utilizing finite state machine in main memory with two disjoint sets of states repres |
Nov. 27, 2001 |
| 6317803 |
High-throughput interconnect having pipelined and non-pipelined bus transaction modes |
Nov. 13, 2001 |
| 6134629 |
Determining thresholds and wrap-around conditions in a first-in-first-out memory supporting a variety of read and write transaction sizes |
Oct. 17, 2000 |
| 6125410 |
D.M.A. controller that determines whether the mode of operation as either interrupt or D.M.A. via single control line |
Sep. 26, 2000 |
| 6098144 |
Solid state data processor with versatile multisource interrupt organization |
Aug. 1, 2000 |
| 6002877 |
Interrupt control method for controlling an interrupt from a peripheral device to a processor |
Dec. 14, 1999 |
| 5948093 |
Microprocessor including an interrupt polling unit configured to poll external devices for interrupts when said microprocessor is in a task switch state |
Sep. 7, 1999 |
| 5925115 |
Method and system for extending interrupt sources and implementing hardware based and software based prioritization of interrupts for an embedded processor |
Jul. 20, 1999 |
| 5881294 |
System for transforming PCI level interrupts |
Mar. 9, 1999 |
| 5850555 |
System and method for validating interrupts before presentation to a CPU |
Dec. 15, 1998 |
| 5790837 |
Method and system for device virtualization based on an interrupt request in a dos-based environment |
Aug. 4, 1998 |
| 5761534 |
System for arbitrating packetized data from the network to the peripheral resources and prioritizing the dispatching of packets onto the network |
Jun. 2, 1998 |
| 5734911 |
Method of linking peripheral devices all of which use the same IRQ to a single interrupt procedure |
Mar. 31, 1998 |
| 5659760 |
Microprocessor having interrupt vector generation unit and vector fetching command unit to initiate interrupt processing prior to returning interrupt acknowledge information |
Aug. 19, 1997 |
| 5655137 |
Method and apparatus for pre-processing inputs to parallel architecture computers |
Aug. 5, 1997 |
| 5604913 |
Vector processor having a mask register used for performing nested conditional instructions |
Feb. 18, 1997 |
| 5598574 |
Vector processing device |
Jan. 28, 1997 |
| 5553309 |
Device for high speed evaluation of logical expressions and high speed vector operations |
Sep. 3, 1996 |
| 5287523 |
Method for servicing a peripheral interrupt request in a microcontroller |
Feb. 15, 1994 |
| 5063498 |
Data processing device with direct memory access function processed as an micro-code vectored interrupt |
Nov. 5, 1991 |
| 4930065 |
Automatic data channels for a computer system |
May. 29, 1990 |
| 4523277 |
Priority interrupt system for microcomputer |
Jun. 11, 1985 |
| 4268906 |
Data processor input/output controller |
May. 19, 1981 |
| 4237535 |
Apparatus and method for receiving and servicing request signals from peripheral devices in a data processing system |
Dec. 2, 1980 |
| 4090238 |
Priority vectored interrupt using direct memory access |
May. 16, 1978 |
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