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Class Information
Number: 710/40
Name: Electrical computers and digital data processing systems: input/output > Input/output data processing > Input/output access regulation > Access prioritization
Description: Subject matter further comprising means or steps for preferring certain of the peripherals, or digital data processing systems or computers over others in servicing requests therefrom to transfer data.

Sub-classes under this class:

Class Number Class Name Patents
710/41 Dynamic 149
710/42 Group 65
710/43 Physical position 59
710/44 Prioritized polling 68
710/45 Time-slot accessing 143

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11

Patent Number Title Of Patent Date Issued
5517671 System for designating a plurality of I/O devices to a plurality of I/O channels and connecting and buffering the plurality of I/O channels to a single system bus May. 14, 1996
5506968 Terminating access of an agent to a shared resource when a timer, started after a low latency agent requests access, reaches a predetermined value Apr. 9, 1996
5499379 Input/output execution apparatus for a plural-OS run system Mar. 12, 1996
5491824 System and method for improved efficiency and deadlock prevention in communication interfaces utilizing a first-in-first-out action queue Feb. 13, 1996
5450564 Method and apparatus for cache memory access with separate fetch and store queues Sep. 12, 1995
5432911 Controllers request access within one bus cycle causing hardware-wait to stall second controller when first controller is accessing and second controller is still requesting access Jul. 11, 1995
5404556 Apparatus for carrying out asynchronous communication among integrated circuits Apr. 4, 1995
5392404 Bus control preemption logic Feb. 21, 1995
5361375 Virtual computer system having input/output interrupt control of virtual machines Nov. 1, 1994
5305441 Data communication system prioritizing data transfer over microcomputer data interrupt processing Apr. 19, 1994
5241661 DMA access arbitration device in which CPU can arbitrate on behalf of attachment having no arbiter Aug. 31, 1993
5197130 Cluster architecture for a highly parallel scalar/vector multiprocessor system Mar. 23, 1993
5121483 Virtual drives in an automated storage library Jun. 9, 1992
5008808 Consolidation of commands in a buffered input/output device Apr. 16, 1991
4901234 Computer system having programmable DMA control Feb. 13, 1990
4811204 Direct memory access and display system Mar. 7, 1989
4682285 Universal coupling means Jul. 21, 1987
4533994 Priority circuit for a multiplexer terminal Aug. 6, 1985
4484275 Multiprocessor system Nov. 20, 1984
4482949 Unit for prioritizing earlier and later arriving input requests Nov. 13, 1984
4268904 Interruption control method for multiprocessor system May. 19, 1981
4181941 Interrupt system and method Jan. 1, 1980
4181934 Microprocessor architecture with integrated interrupts and cycle steals prioritized channel Jan. 1, 1980
4126893 Interrupt request controller for data processing system Nov. 21, 1978
4121285 Automatic alternator for priority circuit Oct. 17, 1978
4103328 Control apparatus for controlling data flow between a control processing unit and peripheral devices Jul. 25, 1978
4028664 Apparatus for dispatching data of the highest priority process having the highest priority channel to a processor Jun. 7, 1977
4024503 Priority interrupt handling system May. 17, 1977
4000487 Steering code generating apparatus for use in an input/output processing system Dec. 28, 1976
3990055 Control system for magnetic disc storage device Nov. 2, 1976
3967249 Priority selection system in access control Jun. 29, 1976
3950731 Data processing arrangement for printers Apr. 13, 1976

1 2 3 4 5 6 7 8 9 10 11

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