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Class Information
Number: 710/29
Name: Electrical computers and digital data processing systems: input/output > Input/output data processing > Flow controlling
Description: Subject matter further comprising means or steps for controlling a first rate at which a peripheral or the digital data processing system and computer transmit data such that the first rate does not exceed a second rate at which the computer or digital data processing system and peripheral can receive data.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7430622 |
Extended fairness arbitration for chains of point-to -point devices having multiple virtual channels |
Sep. 30, 2008 |
| 7426597 |
Apparatus, system, and method for bus link width optimization of a graphics system |
Sep. 16, 2008 |
| 7426602 |
Switch for bus optimization |
Sep. 16, 2008 |
| 7421507 |
Transmission of AV/C transactions over multiple transports method and apparatus |
Sep. 2, 2008 |
| 7418532 |
Data transfer device, data transfer system, and data transfer method |
Aug. 26, 2008 |
| 7406548 |
Systems and methods for responding to a data transfer |
Jul. 29, 2008 |
| 7404022 |
Method and system for transmission and control of data stored in a USB master to and for utilization by a USB slave |
Jul. 22, 2008 |
| 7404017 |
Method for managing data flow through a processing system |
Jul. 22, 2008 |
| 7398334 |
Circuit for and method of realigning data |
Jul. 8, 2008 |
| 7392332 |
Bit rate adaptation in a data processing flow |
Jun. 24, 2008 |
| 7392334 |
Circuits and methods for high speed and low power data serialization |
Jun. 24, 2008 |
| 7383365 |
Method and system for PCI express audiovisual output |
Jun. 3, 2008 |
| RE40317 |
System for receiving a control signal from a device for selecting its associated clock signal for controlling the transferring of information via a buffer |
May. 13, 2008 |
| 7366802 |
Method in a frame based system for reserving a plurality of buffers based on a selected communication protocol |
Apr. 29, 2008 |
| 7363440 |
System and method for dynamically accessing memory while under normal functional operating conditions |
Apr. 22, 2008 |
| 7363396 |
Supercharge message exchanger |
Apr. 22, 2008 |
| 7363395 |
Intermediate device capable of communicating using different communication protocols |
Apr. 22, 2008 |
| 7359782 |
Vehicular impact reactive system and method |
Apr. 15, 2008 |
| 7349998 |
Bus control system for integrated circuit device with improved bus access efficiency |
Mar. 25, 2008 |
| 7346710 |
Apparatus for input/output expansion without additional control line wherein first and second signals transition directly to a different state when necessary to perform input/output |
Mar. 18, 2008 |
| 7339893 |
Pre-empting low-priority traffic with high-priority traffic on a dedicated link |
Mar. 4, 2008 |
| 7334068 |
Physical layer device having a SERDES pass through mode |
Feb. 19, 2008 |
| 7334065 |
Multiple data bus synchronization |
Feb. 19, 2008 |
| 7325079 |
Information terminal, information processing system, and methods of controlling the same |
Jan. 29, 2008 |
| 7320040 |
Data distribution system |
Jan. 15, 2008 |
| 7320041 |
Controlling flow of data between data processing systems via a memory |
Jan. 15, 2008 |
| 7320042 |
Dynamic network interface |
Jan. 15, 2008 |
| 7315539 |
Method for handling data between a clock and data recovery circuit and a data processing unit of a telecommunications network node of an asynchronous network, as well as a bit rate adaptation |
Jan. 1, 2008 |
| 7315928 |
Apparatus and related method for accessing page mode flash memory |
Jan. 1, 2008 |
| 7299308 |
Data transmission apparatus and electronic control unit |
Nov. 20, 2007 |
| 7299306 |
Dual numerically controlled delay logic for DQS gating |
Nov. 20, 2007 |
| 7296100 |
Packet buffer management apparatus and method |
Nov. 13, 2007 |
| 7293121 |
DMA controller utilizing flexible DMA descriptors |
Nov. 6, 2007 |
| 7287099 |
System for support of remote console by emulation of local console with multipath data flow structure |
Oct. 23, 2007 |
| 7284081 |
Method and system for routing data between USB ports |
Oct. 16, 2007 |
| 7277974 |
Data communication method and apparatus utilizing credit-based data transfer protocol and credit loss detection mechanism |
Oct. 2, 2007 |
| 7272672 |
High speed bus with flow control and extended burst enhancements between sender and receiver wherein counter is maintained at sender for free buffer space available |
Sep. 18, 2007 |
| 7272673 |
Signal generating circuit capable of generating a validation signal and related method thereof |
Sep. 18, 2007 |
| 7254652 |
Autonomic configuration of port speeds of components connected to an interconnection cable |
Aug. 7, 2007 |
| 7251702 |
Network controller and method of controlling transmitting and receiving buffers of the same |
Jul. 31, 2007 |
| 7240130 |
Method of transmitting data through an 12C router |
Jul. 3, 2007 |
| 7234007 |
Adjustable elasticity FIFO buffer have a number of storage cells equal to a frequency offset times a number of data units in a data stream |
Jun. 19, 2007 |
| 7203809 |
Data transfer control method, and peripheral circuit, data processor and processing system for the method |
Apr. 10, 2007 |
| 7200689 |
Cacheable DMA |
Apr. 3, 2007 |
| 7200690 |
Memory access system providing increased throughput rates when accessing large volumes of data by determining worse case throughput rate delays |
Apr. 3, 2007 |
| 7194561 |
Method and apparatus for scheduling requests to a resource using a configurable threshold |
Mar. 20, 2007 |
| 7194562 |
Method, system, and program for throttling data transfer |
Mar. 20, 2007 |
| 7191259 |
Method and apparatus for fast integer within-range compare |
Mar. 13, 2007 |
| 7165130 |
Method and system for an adaptive multimode media queue |
Jan. 16, 2007 |
| 7165129 |
Method and apparatus for self-tuning transaction batching |
Jan. 16, 2007 |
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