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Class Information
Number: 710/264
Name: Electrical computers and digital data processing systems: input/output > Interrupt processing > Interrupt prioritizing
Description: Subject matter further comprising means or steps for processing plural interrupts in accordance with a predetermined ranking.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7051128 |
System and method for data bus communication system between external card connection device and host device |
May. 23, 2006 |
| 7043584 |
Interrupt prioritization in a digital disk apparatus |
May. 9, 2006 |
| 7043729 |
Reducing interrupt latency while polling |
May. 9, 2006 |
| 7043582 |
Self-nesting interrupts |
May. 9, 2006 |
| 7016998 |
System and method for generating sequences and global interrupts in a cluster of nodes |
Mar. 21, 2006 |
| 6993766 |
Integrated circuits for multi-tasking support in single or multiple processor networks |
Jan. 31, 2006 |
| 6993685 |
Technique for testing processor interrupt logic |
Jan. 31, 2006 |
| 6981133 |
Zero overhead computer interrupts with task switching |
Dec. 27, 2005 |
| 6971099 |
Integrated circuits for multi-tasking support in single or multiple processor networks |
Nov. 29, 2005 |
| 6963934 |
Hibernation of computer systems |
Nov. 8, 2005 |
| 6959262 |
Diagnostic monitor for use with an operating system and methods therefor |
Oct. 25, 2005 |
| 6938130 |
Method and apparatus for delaying interfering accesses from other threads during transactional program execution |
Aug. 30, 2005 |
| 6920632 |
Dynamic multilevel task management method and apparatus |
Jul. 19, 2005 |
| 6917997 |
Integrated circuit including interrupt controller with shared preamble execution and global-disable control bit |
Jul. 12, 2005 |
| 6898262 |
Programmable controller |
May. 24, 2005 |
| 6889167 |
Diagnostic exerciser and methods therefor |
May. 3, 2005 |
| 6883037 |
Fast data decoder that operates with reduced output buffer bounds checking |
Apr. 19, 2005 |
| 6877057 |
Information handling system with dynamic interrupt allocation apparatus and methodology |
Apr. 5, 2005 |
| 6851006 |
Interruption handler-operating system dialog for operating system handling of hardware interruptions |
Feb. 1, 2005 |
| 6845419 |
Flexible interrupt controller that includes an interrupt force register |
Jan. 18, 2005 |
| 6842812 |
Event handling |
Jan. 11, 2005 |
| 6842811 |
Methods and apparatus for scalable array processor interrupt detection and response |
Jan. 11, 2005 |
| 6823467 |
Method and apparatus for arbitrary resolution interval timeouts |
Nov. 23, 2004 |
| 6820153 |
Interrupt processing and memory management method in an operation processing device and a device using the same |
Nov. 16, 2004 |
| 6813666 |
Scaleable arbitration and prioritization of multiple interrupts |
Nov. 2, 2004 |
| 6810314 |
Integrated control system for vehicle |
Oct. 26, 2004 |
| 6807595 |
Mobile communication device having a prioritized interrupt controller |
Oct. 19, 2004 |
| 6792497 |
System and method for hardware assisted spinlock |
Sep. 14, 2004 |
| 6792492 |
System and method of lowering overhead and latency needed to service operating system interrupts |
Sep. 14, 2004 |
| 6789150 |
Integrated circuit having arbitrated switching between busses |
Sep. 7, 2004 |
| 6772260 |
Device for and method of generating interrupt signals |
Aug. 3, 2004 |
| 6764017 |
Multi-function electronic card |
Jul. 20, 2004 |
| 6760799 |
Reduced networking interrupts |
Jul. 6, 2004 |
| 6760820 |
Method of arbitrating requests for access to a single buffer memory in a disk drive |
Jul. 6, 2004 |
| 6742089 |
Access controller and access method for controlling access from a CPU to a memory based on use states of plural access ports |
May. 25, 2004 |
| 6738849 |
Real-time communications for speeding up packet transmission |
May. 18, 2004 |
| 6725309 |
Multistage interrupt controller for receiving a plurality of interrupt signals to generate a priority interrupt signal |
Apr. 20, 2004 |
| 6718413 |
Contention-based methods for generating reduced number of interrupts |
Apr. 6, 2004 |
| 6711641 |
Operation processing apparatus |
Mar. 23, 2004 |
| 6694398 |
Circuit for selecting interrupt requests in RISC microprocessors |
Feb. 17, 2004 |
| 6681281 |
System and method for implementing a multi-level interrupt scheme in a computer system |
Jan. 20, 2004 |
| 6662297 |
Allocation of processor bandwidth by inserting interrupt servicing instructions to intervene main program in instruction queue mechanism |
Dec. 9, 2003 |
| 6651126 |
Snapshot arbiter mechanism |
Nov. 18, 2003 |
| 6640274 |
Method and apparatus for reducing the disk drive data transfer interrupt service latency penalty |
Oct. 28, 2003 |
| 6636916 |
Assigning PCI device interrupts in a computer system |
Oct. 21, 2003 |
| 6633941 |
Reduced networking interrupts |
Oct. 14, 2003 |
| 6633942 |
Distributed real-time operating system providing integrated interrupt management |
Oct. 14, 2003 |
| 6618780 |
Method and apparatus for controlling interrupt priority resolution |
Sep. 9, 2003 |
| 6606676 |
Method and apparatus to distribute interrupts to multiple interrupt handlers in a distributed symmetric multiprocessor system |
Aug. 12, 2003 |
| 6598105 |
Interrupt arbiter for a computing system |
Jul. 22, 2003 |
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