| |
 |
|
Class Information
Number: 710/25
Name: Electrical computers and digital data processing systems: input/output > Input/output data processing > Direct memory accessing (dma) > Timing
Description: Subject matter further comprising means or steps for determining when to transfer data directly between a peripheral and memory.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620745 |
Transferring data between a memory and peripheral units employing direct memory access control |
Nov. 17, 2009 |
| 7606961 |
Computer system and data pre-fetching method |
Oct. 20, 2009 |
| 7571266 |
Peripheral device in a computerized system and method |
Aug. 4, 2009 |
| 7568055 |
Data processing apparatus for selecting either a PIO data transfer method or a DMA data transfer method |
Jul. 28, 2009 |
| 7565460 |
Information processing apparatus and method for handling packet streams |
Jul. 21, 2009 |
| 7546391 |
Direct memory access channel controller with quick channels, event queue and active channel memory protection |
Jun. 9, 2009 |
| 7546392 |
Data transfer with single channel controller controlling plural transfer controllers |
Jun. 9, 2009 |
| 7533198 |
Memory controller and method for handling DMA operations during a page copy |
May. 12, 2009 |
| 7506079 |
Data processor and data communication method |
Mar. 17, 2009 |
| 7472207 |
Optimized-incrementing, time-gap defect detection apparatus and method |
Dec. 30, 2008 |
| 7472205 |
Communication control apparatus which has descriptor cache controller that builds list of descriptors |
Dec. 30, 2008 |
| 7464197 |
Distributed direct memory access for systems on chip |
Dec. 9, 2008 |
| 7444441 |
Device including means for transferring information indicating whether or not the device supports DMA |
Oct. 28, 2008 |
| 7441054 |
Method of accessing internal memory of a processor and device thereof |
Oct. 21, 2008 |
| 7437487 |
Storage medium array controller, a storage medium array apparatus, a storage medium drive, a method of controlling a storage medium array, and a signal-bearing medium embodying a program of a |
Oct. 14, 2008 |
| 7404015 |
Methods and apparatus for processing packets including accessing one or more resources shared among processing engines |
Jul. 22, 2008 |
| 7389365 |
Arbitrating and servicing polychronous data requests in direct memory access |
Jun. 17, 2008 |
| 7383363 |
Method and apparatus for interval DMA transfer access |
Jun. 3, 2008 |
| 7380115 |
Transferring data using direct memory access |
May. 27, 2008 |
| 7380027 |
DMA controller and DMA transfer method |
May. 27, 2008 |
| 7376762 |
Systems and methods for direct memory access |
May. 20, 2008 |
| RE40261 |
Apparatus and method of partially transferring data through bus and bus master control device |
Apr. 22, 2008 |
| 7359996 |
Data transfer control device, electronic equipment, and data transfer control method |
Apr. 15, 2008 |
| 7340554 |
USB host controller with DMA capability |
Mar. 4, 2008 |
| 7321451 |
Data converting circuit, data converting method, and image forming apparatus |
Jan. 22, 2008 |
| 7305499 |
DMA controller for controlling and measuring the bus occupation time value for a plurality of DMA transfers |
Dec. 4, 2007 |
| 7302699 |
Logged-in device and log-in device |
Nov. 27, 2007 |
| 7259876 |
Image processing apparatus, and, control method and control device therefor |
Aug. 21, 2007 |
| 7249203 |
Programmatic time-gap defect detection apparatus and method |
Jul. 24, 2007 |
| 7219169 |
Composite DMA disk controller for efficient hardware-assisted data transfer operations |
May. 15, 2007 |
| 7164425 |
Method and system for high speed network application |
Jan. 16, 2007 |
| 7159060 |
PCI standard hot-plug controller (SHPC) with user programmable command execution timing |
Jan. 2, 2007 |
| 7139848 |
DMA protocol extension for packet-based transfer |
Nov. 21, 2006 |
| 7133942 |
Sequence-preserving multiprocessing system with multimode TDM buffer |
Nov. 7, 2006 |
| 7130933 |
Method, system, and program for handling input/output commands |
Oct. 31, 2006 |
| 7124270 |
Transceiver with latency alignment circuitry |
Oct. 17, 2006 |
| 7103764 |
Parallel port with direct memory access capabilities |
Sep. 5, 2006 |
| 7089336 |
Arbitrating and servicing polychronous data requests in Direct Memory Access |
Aug. 8, 2006 |
| 7065622 |
Transceiver with latency alignment circuitry |
Jun. 20, 2006 |
| 7057414 |
Avoiding oscillation in self-synchronous bi-directional communication system |
Jun. 6, 2006 |
| 7047328 |
Method and apparatus for accessing memories having a time-variant response over a PCI bus by using two-stage DMA transfers |
May. 16, 2006 |
| 7039728 |
Information processing device and method |
May. 2, 2006 |
| 7035246 |
Maintaining a global time reference among a group of networked devices |
Apr. 25, 2006 |
| 7017180 |
Logged-in device and log-in device |
Mar. 21, 2006 |
| 7010658 |
Transceiver with latency alignment circuitry |
Mar. 7, 2006 |
| 7007116 |
Electronic apparatus and startup control method of storage device |
Feb. 28, 2006 |
| 7003593 |
Computer system architecture and memory controller for close-coupling within a hybrid processing system utilizing an adaptive processor interface port |
Feb. 21, 2006 |
| 6985977 |
System and method for transferring data over a communication medium using double-buffering |
Jan. 10, 2006 |
| 6950869 |
Information processing apparatus, method and memory medium therefor |
Sep. 27, 2005 |
| 6934347 |
Method for recovering a clock signal in a telecommunications system and circuit thereof |
Aug. 23, 2005 |
|
|
|
