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Class Information
Number: 710/243
Name: Electrical computers and digital data processing systems: input/output > Access arbitrating > Hierarchical or multilevel arbitrating
Description: Subject matter further comprising means or steps for performing more than one level of arbitration.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7433989 |
Arbitration method of a bus bridge |
Oct. 7, 2008 |
| 7412551 |
Methods and apparatus for supporting programmable burst management schemes on pipelined buses |
Aug. 12, 2008 |
| 7406690 |
Flow lookahead in an ordered semaphore management subsystem |
Jul. 29, 2008 |
| 7386645 |
System on a chip with an arbitration unit to grant right of access to a common resource in response to conflicting requests for access from initiator modules, and storage key incorporating the |
Jun. 10, 2008 |
| 7380038 |
Priority registers for biasing access to shared resources |
May. 27, 2008 |
| 7373445 |
Method and apparatus for allocating bus access rights in multimaster bus systems |
May. 13, 2008 |
| 7356631 |
Apparatus and method for scheduling requests to source device in a memory access system |
Apr. 8, 2008 |
| 7353310 |
Hierarchical memory access via pipelining with deferred arbitration |
Apr. 1, 2008 |
| 7337251 |
Information processing device with priority-based bus arbitration |
Feb. 26, 2008 |
| 7328292 |
Arbitration method and device |
Feb. 5, 2008 |
| 7315909 |
Hierarchized arbitration method |
Jan. 1, 2008 |
| 7308518 |
Interrupt controlling circuit |
Dec. 11, 2007 |
| 7305507 |
Multi-stage round robin arbitration system |
Dec. 4, 2007 |
| 7302510 |
Fair hierarchical arbiter |
Nov. 27, 2007 |
| 7299311 |
Apparatus and method for arbitrating for a resource group with programmable weights |
Nov. 20, 2007 |
| 7296105 |
Method and apparatus for configuring an interconnect to implement arbitration |
Nov. 13, 2007 |
| 7269676 |
Method and apparatus for controlling an external RF device with a dual processor system |
Sep. 11, 2007 |
| 7263568 |
Interrupt system using event data structures |
Aug. 28, 2007 |
| 7234012 |
Peripheral component interconnect arbiter implementation with dynamic priority scheme |
Jun. 19, 2007 |
| 7149829 |
Various methods and apparatuses for arbitration among blocks of functionality |
Dec. 12, 2006 |
| 7143224 |
Smart card for performing advance operations to enhance performance and related system, integrated circuit, and methods |
Nov. 28, 2006 |
| 7143219 |
Multilevel fair priority round robin arbiter |
Nov. 28, 2006 |
| 7130947 |
Method of arbitration which allows requestors from multiple frequency domains |
Oct. 31, 2006 |
| 7127540 |
Apparatus and method for controlling frequency of bus use |
Oct. 24, 2006 |
| 7124224 |
Method and apparatus for shared resource management in a multiprocessing system |
Oct. 17, 2006 |
| 7120715 |
Priority arbitration based on current task and MMU |
Oct. 10, 2006 |
| 7120714 |
High-speed starvation-free arbiter system, rotating-priority arbiter, and two stage arbitration method |
Oct. 10, 2006 |
| 7117281 |
Circuit, system, and method for data transfer control for enhancing data bus utilization |
Oct. 3, 2006 |
| 7111101 |
Method and system for port numbering in an interconnect device |
Sep. 19, 2006 |
| 7099975 |
Method of resource arbitration |
Aug. 29, 2006 |
| 7093047 |
Integrated circuit memory devices having clock signal arbitration circuits therein and methods of performing clock signal arbitration |
Aug. 15, 2006 |
| 7080177 |
System and method for arbitrating clients in a hierarchical real-time DRAM system |
Jul. 18, 2006 |
| 7051133 |
Arbitration circuit and data processing system |
May. 23, 2006 |
| 7051135 |
Hierarchical bus arbitration |
May. 23, 2006 |
| 7039736 |
Systems and methods for accessing bus-mastered system resources |
May. 2, 2006 |
| 7024506 |
Hierarchically expandable fair arbiter |
Apr. 4, 2006 |
| 7010633 |
Apparatus, system and method for controlling access to facilities based on usage classes |
Mar. 7, 2006 |
| 7007123 |
Binary tree arbitration system and method using embedded logic structure for controlling flag direction in multi-level arbiter node |
Feb. 28, 2006 |
| 7000049 |
Systems and methods for reliably selecting bus mastership in a fault tolerant manner |
Feb. 14, 2006 |
| 6976109 |
Multi-level and multi-resolution bus arbitration |
Dec. 13, 2005 |
| 6954812 |
Two-stage round robin arbitration system |
Oct. 11, 2005 |
| 6954844 |
Microprocessor architecture capable of supporting multiple heterogeneous processors |
Oct. 11, 2005 |
| 6901487 |
Device for processing data by means of a plurality of processors |
May. 31, 2005 |
| 6877053 |
High performance communication architecture for circuit designs using probabilistic allocation of resources |
Apr. 5, 2005 |
| 6877055 |
Method and apparatus for efficiently broadcasting transactions between a first address repeater and a second address repeater |
Apr. 5, 2005 |
| 6859852 |
Immediate grant bus arbiter for bus system |
Feb. 22, 2005 |
| 6826643 |
Method of synchronizing arbiters within a hierarchical computer system |
Nov. 30, 2004 |
| 6785888 |
Memory allocator for a multiprocessor computer system |
Aug. 31, 2004 |
| 6782441 |
Arbitration method and apparatus |
Aug. 24, 2004 |
| 6763414 |
Fly-by serial bus arbitration |
Jul. 13, 2004 |
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