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Class Information
Number: 710/111
Name: Electrical computers and digital data processing systems: input/output > Intrasystem connection (e.g., bus and bus transaction processing) > Bus access regulation > Rotational prioritizing (i.e., round robin)
Description: Subject matter including means or steps for granting bus access to all contending digital data processing system components one at a time in a predetermined order before any one digital data processing system components may again obtain the bus.


Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
7385965 Multiprocessor control block for use in a communication switch and method therefore Jun. 10, 2008
7350002 Round-robin bus protocol Mar. 25, 2008
7325082 System and method for guaranteeing transactional fairness among multiple requesters Jan. 29, 2008
7305507 Multi-stage round robin arbitration system Dec. 4, 2007
7302510 Fair hierarchical arbiter Nov. 27, 2007
7260688 Method and apparatus for controlling access to memory circuitry Aug. 21, 2007
7254674 Distribution of I/O requests across multiple disk units Aug. 7, 2007
7243168 Low power CD-ROM player with CD-ROM subsystem for portable computer capable of isolating digital computer bus from CD-ROM drive Jul. 10, 2007
7240135 Method of balancing work load with prioritized tasks across a multitude of communication ports Jul. 3, 2007
7225280 Portable device for one-on-one transfer between another such device wherein device is restricted to data storage and transfer with single interface for data exchange May. 29, 2007
7209992 Graphics display system with unified memory architecture Apr. 24, 2007
7197577 Autonomic input/output scheduler selector Mar. 27, 2007
7181547 Identifying nodes in a ring network Feb. 20, 2007
7181558 Avoidance of extended bus occupancy through simple control operation Feb. 20, 2007
7158046 System and method for radio frequency tag group select Jan. 2, 2007
7143219 Multilevel fair priority round robin arbiter Nov. 28, 2006
7143220 Apparatus and method for granting concurrent ownership to support heterogeneous agents in on-chip busses having different grant-to-valid latencies Nov. 28, 2006
7130942 Interface bus protocol for managing transactions in a system of distributed microprocessor interfaces toward marco-cell based designs implemented as ASIC or FPGA bread boarding Oct. 31, 2006
7127540 Apparatus and method for controlling frequency of bus use Oct. 24, 2006
7120714 High-speed starvation-free arbiter system, rotating-priority arbiter, and two stage arbitration method Oct. 10, 2006
7111098 Information processing apparatus, information processing method, recording medium and program Sep. 19, 2006
7073003 Programmable fixed priority and round robin arbiter for providing high-speed arbitration and bus control method therein Jul. 4, 2006
7051133 Arbitration circuit and data processing system May. 23, 2006
7047335 Method for receiving user defined frame information structure (FIS) types in a serial-ATA (SATA) system May. 16, 2006
7007123 Binary tree arbitration system and method using embedded logic structure for controlling flag direction in multi-level arbiter node Feb. 28, 2006
6996647 Token swapping for hot spot management Feb. 7, 2006
6965923 System and method for assigning addresses to memory devices Nov. 15, 2005
6895459 Bus arbitration method employing a table of slots suitably distributed amongst bus masters May. 17, 2005
6862639 Computer system including a receiver interface circuit with a scatter pointer queue and related methods Mar. 1, 2005
6812852 System and method for selecting a subset of autonomous and independent slave entities Nov. 2, 2004
6771556 Single port random access memory equipped with a relief module to operate as a dual port shared memory Aug. 3, 2004
6769043 Ensuring fair access to upstream trunk bandwidth in ATM subtended configurations Jul. 27, 2004
6728792 Priority queue with arbitrary queuing criteria Apr. 27, 2004
6728832 Distribution of I/O requests across multiple disk units Apr. 27, 2004
6715042 Systems and methods for multiport memory access in a multimaster environment Mar. 30, 2004
6714997 Method and means for enhanced interpretive instruction execution for a new integrated communications adapter using a queued direct input-output device Mar. 30, 2004
6678774 Shared resource arbitration method and apparatus Jan. 13, 2004
RE38388 Method and apparatus for performing deferred transactions Jan. 13, 2004
6678771 Method of adjusting an access sequencing scheme for a number of PCI- compliant units coupled to a PCI bus system Jan. 13, 2004
6675245 Apparatus and method for providing round-robin arbitration Jan. 6, 2004
6654834 Method and apparatus for data transfer employing closed loop of memory nodes Nov. 25, 2003
6647449 System, method and circuit for performing round robin arbitration Nov. 11, 2003
6633926 DMA transfer device capable of high-speed consecutive access to pages in a memory Oct. 14, 2003
6584531 Arbitration circuit with plural arbitration processors using memory bank history Jun. 24, 2003
6516369 Fair and high speed arbitration system based on rotative and weighted priority monitoring Feb. 4, 2003
6411218 Priority-encoding device selection using variable arbitrary rankings Jun. 25, 2002
6385678 Method and apparatus for bus arbitration with weighted bandwidth allocation May. 7, 2002
6345329 Method and apparatus for exchanging data using a queued direct input-output device Feb. 5, 2002
6341317 Method and apparatus for managing a log of information in a computer system including an intelligent storage system Jan. 22, 2002
6339807 Multiprocessor system and the bus arbitrating method of the same Jan. 15, 2002

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