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Class Information
Number: 710/110
Name: Electrical computers and digital data processing systems: input/output > Intrasystem connection (e.g., bus and bus transaction processing) > Bus access regulation > Bus master/slave controlling
Description: Subject matter wherein a digital data processing system component is provided with control over other digital data processing system components connected to the bus.

Patents under this class:
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Patent Number Title Of Patent Date Issued
6834318 Bidirectional bus repeater for communications on a chip Dec. 21, 2004
6826632 System for identifying the interconnection of peripheral devices Nov. 30, 2004
6823411 N-way psuedo cross-bar having an arbitration feature using discrete processor local busses Nov. 23, 2004
6820150 Method and apparatus for providing quality-of-service delivery facilities over a bus Nov. 16, 2004
6816925 Combination personal data assistant and personal computing device with master slave input output Nov. 9, 2004
6816931 Upstream peripheral device serving as a USB host Nov. 9, 2004
6816933 Serial device daisy chaining method and apparatus Nov. 9, 2004
6812852 System and method for selecting a subset of autonomous and independent slave entities Nov. 2, 2004
6813527 High integrity control system architecture using digital computing platforms with rapid recovery Nov. 2, 2004
6813664 System transmitting data in equidistance cycles using successive synchronization signals for detecting and signaling access violations Nov. 2, 2004
6810454 Information processing apparatus having a bus using the protocol of the acknowledge type in the source clock synchronous system Oct. 26, 2004
6807593 Enhanced bus architecture for posted read operation between masters and slaves Oct. 19, 2004
6801972 Interface shutdown mode for a data bus slave Oct. 5, 2004
6799233 Generalized I2C slave transmitter/receiver state machine Sep. 28, 2004
6799234 Apparatus and method for randomly assigning slots in a PCI backplane Sep. 28, 2004
6799235 Daisy chain latency reduction Sep. 28, 2004
6785755 Grant removal via dummy master arbitration Aug. 31, 2004
6782439 Bus system and execution scheduling method for access commands thereof Aug. 24, 2004
6774935 Digital camera Aug. 10, 2004
6772254 Multi-master computer system with overlapped read and write operations and scalable address pipelining Aug. 3, 2004
6772351 Method and apparatus for calibrating a multi-level current mode driver Aug. 3, 2004
6769035 Same single board computer system operable as a system master and a bus target Jul. 27, 2004
6757765 Electronic device, method for using electronic device, and electronic device system for reserving bus usage time on a bus to conduct communications between electronic devices Jun. 29, 2004
6745254 Programmable logic controller method, system and apparatus Jun. 1, 2004
6738844 Implementing termination with a default signal on a bus line May. 18, 2004
6738845 Bus architecture and shared bus arbitration method for a communication device May. 18, 2004
6735653 Bus bandwidth consumption profiler May. 11, 2004
6732217 Control and supervisory signal transmission system May. 4, 2004
6732301 Serial bus diagnostic port of a digital system May. 4, 2004
6728618 Method for activating a system for controlling and/or regulating operational sequences in a motor vehicle having several equal-access control units Apr. 27, 2004
6728808 Mechanism for optimizing transaction retries within a system utilizing a PCI bus architecture Apr. 27, 2004
6728832 Distribution of I/O requests across multiple disk units Apr. 27, 2004
6725306 DEBUG mode for a data bus Apr. 20, 2004
6725307 Method and system for controlling data transfers with physical separation of data functionality from address and control functionality in a distributed multi-bus multiprocessor system Apr. 20, 2004
6725313 Communications system and method with multilevel connection identification Apr. 20, 2004
6718488 Method and system for responding to a failed bus operation in an information processing system Apr. 6, 2004
6715049 Microcomputer and information processing system Mar. 30, 2004
6708246 Signal processing device with bus ownership control function Mar. 16, 2004
6693678 Data bus driver having first and second operating modes for coupling data to the bus at first and second rates Feb. 17, 2004
RE38428 Bus transaction reordering in a computer system having unordered slaves Feb. 10, 2004
6684279 Method, apparatus, and computer program product for controlling data transfer Jan. 27, 2004
6678770 PCI bus control system having intelligent devices that own and manage non-intelligent devices for relaying information from non-intelligent devices Jan. 13, 2004
6678781 Network configuration method Jan. 13, 2004
6665306 Immediate cut-off protocol and interface for a packet-based bus connecting processors Dec. 16, 2003
6665748 Specialized PCMCIA host adapter for use with low cost microprocessors Dec. 16, 2003
6665757 Communication interface having a master activating/deactivating a first signal with a clock signal after a predetermined time after a slave activating/deactivating the first signal Dec. 16, 2003
6662251 Selective targeting of transactions to devices on a shared bus Dec. 9, 2003
6662306 Fast forwarding slave requests in a packet-switched computer system by transmitting request to slave in advance to avoid arbitration delay when system controller validates request Dec. 9, 2003
6654821 Remotely controllable electronic apparatus and remote control method Nov. 25, 2003
6654835 High bandwidth data transfer employing a multi-mode, shared line buffer Nov. 25, 2003

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