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Class Information
Number: 709/212
Name: Electrical computers and digital processing systems: multicomputer data transferring or plural processor synchronization > Computer-to-computer direct memory accessing
Description: Subject matter further comprising means or steps for transferring data between memories of different computers with minimal or no intervention from main processors of the computers.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5758081 |
Computing and communications transmitting, receiving system, with a push button interface, that is continously on, that pairs up with a personal computer and carries out mainly communications |
May. 26, 1998 |
| 5752254 |
Method and system for controlling clipboards in a shared application progam |
May. 12, 1998 |
| 5727147 |
System and method for resolving symbolic references to externally located program files |
Mar. 10, 1998 |
| 5687316 |
Communication apparatus and methods having P-MAC, I-MAC engines and buffer bypass for simultaneously transmitting multimedia and packet data |
Nov. 11, 1997 |
| 5678060 |
System for executing high speed communication protocol processing by predicting protocol header of next frame utilizing successive analysis of protocol header until successful header retrieval |
Oct. 14, 1997 |
| 5675737 |
Message receiving system for use in parallel computer system |
Oct. 7, 1997 |
| 5655082 |
Communication control apparatus between processor systems |
Aug. 5, 1997 |
| 5649112 |
Method and apparatus for modifying microcode in a distributed nodal network while the network continues operation |
Jul. 15, 1997 |
| 5640598 |
Data transfer processing system |
Jun. 17, 1997 |
| 5634099 |
Direct memory access unit for transferring data between processor memories in multiprocessing systems |
May. 27, 1997 |
| 5634076 |
DMA controller responsive to transition of a request signal between first state and second state and maintaining of second state for controlling data transfer |
May. 27, 1997 |
| 5627968 |
Data transfer apparatus which allows data to be transferred between data devices without accessing a shared memory |
May. 6, 1997 |
| 5623622 |
Memory access control system which prohibits a memory access request to allow a central control unit to perform software operations |
Apr. 22, 1997 |
| 5598541 |
Node loop port communication interface super core for fibre channel |
Jan. 28, 1997 |
| 5592624 |
Data communication for controlling message transmission and reception among processing modules using information stored in descriptor to form a loosely coupled multiprocessing system |
Jan. 7, 1997 |
| 5588120 |
Communication control system for transmitting, from one data processing device to another, data of different formats along with an identification of the format and its corresponding DMA contro |
Dec. 24, 1996 |
| 5577229 |
Computer system and method for pipelined transfer of data between modules utilizing a shared memory and a pipeline having a plurality of registers |
Nov. 19, 1996 |
| 5541853 |
Processor configurable for both virtual mode and protected mode |
Jul. 30, 1996 |
| 5535333 |
Adapter for interleaving second data with first data already transferred between first device and second device without having to arbitrate for ownership of communications channel |
Jul. 9, 1996 |
| 5522060 |
Multiprocessor memory managing system and method for executing sequentially renewed instructions by locking and alternately reading slave memories |
May. 28, 1996 |
| 5488724 |
Network controller with memory request and acknowledgement signals and a network adapter therewith |
Jan. 30, 1996 |
| 5475860 |
Input/output control system and method for direct memory transfer according to location addresses provided by the source unit and destination addresses provided by the destination unit |
Dec. 12, 1995 |
| 5455950 |
Universal device for coupling a computer bus to a specific link of a network and operating system therefor |
Oct. 3, 1995 |
| 5430844 |
Communication control system for transmitting, from one data processing device to another, data along with an identification of the address at which the data is to be stored upon reception |
Jul. 4, 1995 |
| 5420984 |
Apparatus and method for rapid switching between control of first and second DMA circuitry to effect rapid switching beween DMA communications |
May. 30, 1995 |
| 5414813 |
Direct transfer from a receive buffer to a host in a token-passing type network data transmission system |
May. 9, 1995 |
| 5412782 |
Programmed I/O ethernet adapter with early interrupts for accelerating data transfer |
May. 2, 1995 |
| 5404450 |
Communications processor system with control of downloaded tasks |
Apr. 4, 1995 |
| 5394526 |
Data server for transferring selected blocks of remote file to a distributed computer network involving only single data transfer operation |
Feb. 28, 1995 |
| 5363484 |
Multiple computer system with combiner/memory interconnection system employing separate direct access link for transferring information packets |
Nov. 8, 1994 |
| 5355453 |
Parallel I/O network file server architecture |
Oct. 11, 1994 |
| 5299313 |
Network interface with host independent buffer management |
Mar. 29, 1994 |
| 5257374 |
Bus flow control mechanism |
Oct. 26, 1993 |
| 5247626 |
FDDI controller having flexible buffer management |
Sep. 21, 1993 |
| 5247616 |
Computer system having different communications facilities and data transfer processes between different computers |
Sep. 21, 1993 |
| 5222227 |
Direct memory access controller for a multi-microcomputer system |
Jun. 22, 1993 |
| 5206933 |
Data link controller with channels selectively allocatable to hyper channels and hyper channel data funneled through reference logical channels |
Apr. 27, 1993 |
| 5175818 |
Communication interface for independently generating frame information that is subsequently stored in host memory and sent out to transmitting fifo by dma |
Dec. 29, 1992 |
| 5175825 |
High speed, flexible source/destination data burst direct memory access controller |
Dec. 29, 1992 |
| 5155857 |
Communication processing system in which communication by terminals is controlled according to a terminal management table |
Oct. 13, 1992 |
| 5142628 |
Microcomputer system for communication |
Aug. 25, 1992 |
| 5093780 |
Inter-processor transmission system having data link which automatically and periodically reads and writes the transfer data |
Mar. 3, 1992 |
| 5072374 |
Method for communicating among a plurality of programmable logic controllers each having a DMA controller |
Dec. 10, 1991 |
| 5047927 |
Memory management in packet data mode systems |
Sep. 10, 1991 |
| 5019962 |
Direct memory access controller for a multi-microcomputer system |
May. 28, 1991 |
| 4979096 |
Multiprocessor system |
Dec. 18, 1990 |
| 4965721 |
Firmware state apparatus for controlling sequencing of processing including test operation in multiple data lines of communication |
Oct. 23, 1990 |
| 4930069 |
Mechanism and method for transferring data between bus units having varying master and slave DMA capabilities |
May. 29, 1990 |
| 4922416 |
Interface device end message storing with register and interrupt service registers for directing segmented message transfer between intelligent switch and microcomputer |
May. 1, 1990 |
| 4866597 |
Multiprocessor system and control method therefor |
Sep. 12, 1989 |
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