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Class Information
Number: 708/714
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Addition/subtraction > Binary > Parallel > Conditional sums
Description: Subject matter wherein the addition or subtraction is performed utilizing conditional sums.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7587444 |
Data value addition |
Sep. 8, 2009 |
| 7571204 |
M-bit race delay adder and method of operation |
Aug. 4, 2009 |
| 7523153 |
Method of forcing 1's and inverting sum in an adder without incurring timing delay |
Apr. 21, 2009 |
| 7509368 |
Sparse tree adder circuit |
Mar. 24, 2009 |
| 7508233 |
Full-adder of complementary carry logic voltage compensation |
Mar. 24, 2009 |
| 7424508 |
Self-timed carry look-ahead adder and summation method thereof |
Sep. 9, 2008 |
| 7330869 |
Hybrid arithmetic logic unit |
Feb. 12, 2008 |
| 7277909 |
High speed adder |
Oct. 2, 2007 |
| 7194501 |
Complementary pass gate logic implementation of 64-bit arithmetic logic unit using propagate, generate, and kill |
Mar. 20, 2007 |
| 7188134 |
High-performance adder |
Mar. 6, 2007 |
| 7159004 |
Adder, multiplier and integrated circuit |
Jan. 2, 2007 |
| 7085798 |
Sense-amp based adder with source follower pass gate evaluation tree |
Aug. 1, 2006 |
| 6839729 |
Method and apparatus for a multi-purpose domino adder |
Jan. 4, 2005 |
| 6832235 |
Multiple block adder using carry increment adder |
Dec. 14, 2004 |
| 6782406 |
Fast CMOS adder with null-carry look-ahead |
Aug. 24, 2004 |
| 6470374 |
Carry look-ahead for bi-endian adder |
Oct. 22, 2002 |
| 6408320 |
Instruction set architecture with versatile adder carry control |
Jun. 18, 2002 |
| 6343306 |
High speed one's complement adder |
Jan. 29, 2002 |
| 6275839 |
Method and system for immediate exponent normalization in a fast floating point adder |
Aug. 14, 2001 |
| 6134576 |
Parallel adder with independent odd and even sum bit generation cells |
Oct. 17, 2000 |
| 6125381 |
Recursively partitioned carry select adder |
Sep. 26, 2000 |
| 6076098 |
Adder for generating sum and sum plus one in parallel |
Jun. 13, 2000 |
| 6012079 |
Conditional sum adder using pass-transistor logic and integrated circuit having the same |
Jan. 4, 2000 |
| 6003059 |
Carry select adder using two level selectors |
Dec. 14, 1999 |
| 5975749 |
Zero and one detection chain for a carry select adder |
Nov. 2, 1999 |
| 5953240 |
SIMD TCP/UDP checksumming in a CPU |
Sep. 14, 1999 |
| 5944772 |
Combined adder and logic unit |
Aug. 31, 1999 |
| 5875125 |
X+2X adder with multi-bit generate/propagate circuit |
Feb. 23, 1999 |
| 5852568 |
System and method for a fast carry/sum select adder |
Dec. 22, 1998 |
| 5838602 |
Fast carry generation adder having grouped carry muxes |
Nov. 17, 1998 |
| 5764550 |
Arithmetic logic unit with improved critical path performance |
Jun. 9, 1998 |
| 5732008 |
Low-power high performance adder |
Mar. 24, 1998 |
| 5694350 |
Rounding adder for floating point processor |
Dec. 2, 1997 |
| 5654911 |
Carry select and input select adder for late arriving data |
Aug. 5, 1997 |
| 5636157 |
Modular 64-bit integer adder |
Jun. 3, 1997 |
| 5631860 |
Carry Selecting system type adder |
May. 20, 1997 |
| 5619443 |
Carry select and input select adder for late arriving data |
Apr. 8, 1997 |
| 5604692 |
Method of controlling drug conveyor system |
Feb. 18, 1997 |
| 5579254 |
Fast static CMOS adder |
Nov. 26, 1996 |
| 5576765 |
Video decoder |
Nov. 19, 1996 |
| 5546335 |
Absolute value calculation method and circuit |
Aug. 13, 1996 |
| 5506800 |
Self-checking complementary adder unit |
Apr. 9, 1996 |
| 5499202 |
Residue circuit |
Mar. 12, 1996 |
| 5493525 |
Carry-chain compiler |
Feb. 20, 1996 |
| 5487025 |
Carry chain adder using regenerative push-pull differential logic |
Jan. 23, 1996 |
| 5483478 |
Method and structure for reducing carry delay for a programmable carry chain |
Jan. 9, 1996 |
| 5471414 |
Fast static CMOS adder |
Nov. 28, 1995 |
| 5434810 |
Binary operator using block select look ahead system which serves as parallel adder/subtracter able to greatly reduce the number of elements of circuit with out sacrifice to high speed of comp |
Jul. 18, 1995 |
| 5424972 |
Carry look ahead circuit |
Jun. 13, 1995 |
| 5396445 |
Binary carry-select adder |
Mar. 7, 1995 |
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