Resources Contact Us Home
Browse by Category: Main > Information Technology
Class Information
Number: 708/626
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Multiplication > Binary > Sum of cross products
Description: Subject matter wherein the multiplication is effected by the sum of cross products technique.

Patents under this class:
1 2

Patent Number Title Of Patent Date Issued
8667043 Method and apparatus for multiplying binary operands Mar. 4, 2014
8667046 Generalized programmable counter arrays Mar. 4, 2014
8364741 Motion-compensating device with booth multiplier that reduces power consumption without increasing the circuit size Jan. 29, 2013
8028015 Method and system for large number multiplication Sep. 27, 2011
7139788 Multiplication logic circuit Nov. 21, 2006
6938061 Parallel counter and a multiplication logic circuit Aug. 30, 2005
6883011 Parallel counter and a multiplication logic circuit Apr. 19, 2005
RE38387 Multiplier circuit for multiplication operation between binary and twos complement numbers Jan. 13, 2004
6567834 Implementation of multipliers in programmable arrays May. 20, 2003
6535646 Discrete cosine transform method and apparatus Mar. 18, 2003
6530011 Method and apparatus for vector register with scalar values Mar. 4, 2003
6490608 Fast parallel multiplier implemented with improved tree reduction schemes Dec. 3, 2002
6470371 Parallel multiplier Oct. 22, 2002
6385634 Method for performing multiply-add operations on packed data May. 7, 2002
6202078 Arithmetic circuit using a booth algorithm Mar. 13, 2001
6167421 Methods and apparatus for performing fast multiplication operations in bit-serial processors Dec. 26, 2000
6151617 Multiplier circuit for multiplication operation between binary and twos complement numbers Nov. 21, 2000
6122655 Efficient use of inverting cells in multiplier converter Sep. 19, 2000
6066178 Automated design method and system for synthesizing digital multipliers May. 23, 2000
6035316 Apparatus for performing multiply-add operations on packed data Mar. 7, 2000
6026483 Method and apparatus for simultaneously performing arithmetic on two or more pairs of operands Feb. 15, 2000
5983256 Apparatus for performing multiply-add operations on packed data Nov. 9, 1999
5978827 Arithmetic processing Nov. 2, 1999
5963744 Method and apparatus for custom operations of a processor Oct. 5, 1999
5953241 Multiplier array processing system with enhanced utilization at lower precision for group multiply and sum instruction Sep. 14, 1999
5944775 Sum-of-products arithmetic unit Aug. 31, 1999
5935201 Multiplier circuit for multiplication operation between binary and twos complement numbers Aug. 10, 1999
5928317 Fast converter for left-to-right carry-free multiplier Jul. 27, 1999
5914892 Structure and method of array multiplication Jun. 22, 1999
5883825 Reduction of partial product arrays using pre-propagate set-up Mar. 16, 1999
5798956 Parallel multiplier Aug. 25, 1998
5764558 Method and system for efficiently multiplying signed and unsigned variable width operands Jun. 9, 1998
5721697 Performing tree additions via multiplication Feb. 24, 1998
5699286 Wavelet transform processor using a pipeline with a bit unit Dec. 16, 1997
5586071 Enhanced fast multiplier Dec. 17, 1996
5521856 Multiplier capable of calculating double precision, single precision, inner product and multiplying complex May. 28, 1996
5473559 Hardware implemented multiplier Dec. 5, 1995
5473558 Method for generating hardware description of multiplier and/or multiplier-adder Dec. 5, 1995
5457646 Partial carry-save pipeline multiplier Oct. 10, 1995
5446909 Binary multiplication implemented by existing hardware with minor modifications to sequentially designate bits of the operand Aug. 29, 1995
5442799 Digital signal processor with high speed multiplier means for double data input Aug. 15, 1995
5343417 Fast multiplier Aug. 30, 1994
5299146 Matrix arithmetic circuit Mar. 29, 1994
5283755 Multiplier employing carry select or carry look-ahead adders in hierarchical tree configuration Feb. 1, 1994
5181184 Apparatus for multiplying real-time 2's complement code in a digital signal processing system and a method for the same Jan. 19, 1993
5166895 Input-weighted transversal filter Nov. 24, 1992
5159568 High speed parallel multiplier circuit Oct. 27, 1992
5153849 Multiplier having an optimum arrangement of anding circuits and adding circuits Oct. 6, 1992
5151875 MOS array multiplier cell Sep. 29, 1992
5146421 High speed parallel multiplier circuit Sep. 8, 1992

1 2

  Recently Added Patents
Photoelectric conversion device
Content protection apparatus and content encryption and decryption apparatus using white-box encryption table
Output device, source apparatus, television set, system, output method, program, and recording medium
Managing deduplication density
Method and apparatus for a cryptographically assisted commercial network system designed to facilitate buyer-driven conditional purchase offers
Thermally efficient busway
Electronic component and a system and method for producing an electronic component
  Randomly Featured Patents
Dispersive dielectric mirror
Method of decreasing the rate of photoyellowing with thiocyanic acid
Drying apparatus
Method and device for sensorless vector control for AC motor
Method for manufacturing a liquid discharge head
Silicone glove
Method and apparatus for encrypting and processing data in flash translation layer
Composite optical fiber and power cable
Circuit arrangement for interruption-free voltage switching
System and method for generating an alert signal indicating that an additional sector-carrier should be installed in a wireless coverage area, or that a sector-carrier in the wireless coverage