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Class Information
Number: 708/551
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Compensation for finite word length > Round off or truncation
Description: Subject matter wherein the modification is an adjustment of the more significant digits in accordance with some specific rule or a deletion of one or more of the least significant digits.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7616820 |
System and method for reducing discontinuity of gray level in an image buffer memory |
Nov. 10, 2009 |
| 7577699 |
Apparatus and method for reducing precision of data |
Aug. 18, 2009 |
| 7564971 |
Apparatus and method for performing Montgomery type modular multiplication |
Jul. 21, 2009 |
| 7487196 |
Methods and apparatus for implementing a saturating multiplier |
Feb. 3, 2009 |
| 7467176 |
Saturation and rounding in multiply-accumulate blocks |
Dec. 16, 2008 |
| 7467177 |
Mathematical circuit with dynamic rounding |
Dec. 16, 2008 |
| 7340498 |
Apparatus and method for determining fixed point in mobile communication system |
Mar. 4, 2008 |
| 7174358 |
System, method, and apparatus for division coupled with truncation of signed binary numbers |
Feb. 6, 2007 |
| 7165086 |
System, method, and apparatus for division coupled with rounding of signed binary numbers |
Jan. 16, 2007 |
| 7155472 |
Fixed-point quantizer for video coding |
Dec. 26, 2006 |
| RE39121 |
Processor which can favorably execute a rounding process composed of positive conversion and saturated calculation processing |
Jun. 6, 2006 |
| 7047272 |
Rounding mechanisms in processors |
May. 16, 2006 |
| 7035892 |
Apparatus and method for reducing precision of data |
Apr. 25, 2006 |
| 7013321 |
Methods and apparatus for performing parallel integer multiply accumulate operations |
Mar. 14, 2006 |
| 6988120 |
Arithmetic unit and method thereof |
Jan. 17, 2006 |
| 6978289 |
Apparatus and method for minimizing accumulated rounding errors in coefficient values in a lookup table for interpolating polynomials |
Dec. 20, 2005 |
| 6898614 |
Round-off algorithm without bias for 2's complement data |
May. 24, 2005 |
| 6889242 |
Rounding operations in computer processor |
May. 3, 2005 |
| 6874007 |
Apparatus and method for reducing precision of data |
Mar. 29, 2005 |
| 6801925 |
Bit reduction using dither, rounding and error feedback |
Oct. 5, 2004 |
| 6795841 |
Parallel processing of multiple data values within a data word |
Sep. 21, 2004 |
| 6792444 |
Filter devices and methods |
Sep. 14, 2004 |
| 6792443 |
Economical on-the-fly rounding for digit-recurrence algorithms |
Sep. 14, 2004 |
| 6760036 |
Extended precision visual system |
Jul. 6, 2004 |
| 6751359 |
Method to program bit vectors for an increasing nonlinear filter |
Jun. 15, 2004 |
| 6704761 |
Carry-save multiplier/accumulator system and method |
Mar. 9, 2004 |
| 6687898 |
Optimization of n-base typed arithmetic expressions |
Feb. 3, 2004 |
| 6658443 |
Method and apparatus for representing arithmetic intervals within a computer system |
Dec. 2, 2003 |
| 6560623 |
Method and apparatus for producing correctly rounded values of functions using double precision operands |
May. 6, 2003 |
| 6557021 |
Rounding anticipator for floating point operations |
Apr. 29, 2003 |
| 6535898 |
Fast floating-point truncation to integer form |
Mar. 18, 2003 |
| 6513055 |
Apparatus and method for data width reduction in automotive systems |
Jan. 28, 2003 |
| 6493738 |
Apparatus and method for rounding numerical values according to significant digits or rounding interval |
Dec. 10, 2002 |
| 6401107 |
Method and processor for reducing computational error in a processor having no rounding support |
Jun. 4, 2002 |
| 6397238 |
Method and apparatus for rounding in a multiplier |
May. 28, 2002 |
| 6366943 |
Adder circuit with the ability to detect zero when rounding |
Apr. 2, 2002 |
| 6360204 |
Method and apparatus for implementing rounding in decoding an audio signal |
Mar. 19, 2002 |
| 6311239 |
Architecture, circuitry and method for transmitting n-bit wide data over m-bit wide media |
Oct. 30, 2001 |
| 6292815 |
Data conversion between floating point packed format and integer scalar format |
Sep. 18, 2001 |
| 6243728 |
Partitioned shift right logic circuit having rounding support |
Jun. 5, 2001 |
| 6237084 |
Processor which can favorably execute a rounding process composed of positive conversion and saturated calculation processing |
May. 22, 2001 |
| 6219684 |
Optimized rounding in underflow handlers |
Apr. 17, 2001 |
| 6209017 |
High speed digital signal processor |
Mar. 27, 2001 |
| 6195672 |
Saturation detection in floating point to integer conversions |
Feb. 27, 2001 |
| 6167419 |
Multiplication method and multiplication circuit |
Dec. 26, 2000 |
| 6161119 |
Hardware multiplication of scaled integers |
Dec. 12, 2000 |
| 6148317 |
Method and apparatus for compressing signals in a fixed point format without introducing a bias |
Nov. 14, 2000 |
| 6134574 |
Method and apparatus for achieving higher frequencies of exactly rounded results |
Oct. 17, 2000 |
| 6108772 |
Method and apparatus for supporting multiple floating point processing models |
Aug. 22, 2000 |
| 6058410 |
Method and apparatus for selecting a rounding mode for a numeric operation |
May. 2, 2000 |
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