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Class Information
Number: 708/523
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Multiplication followed by addition (i.e., x*y+z)
Description: Subject matter wherein the operation performed is a multiplication followed by an addition.


Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
7624138 Method and apparatus for efficient integer transform Nov. 24, 2009
7596472 Device for synthesis of a composite digital signal with explicit control of the first three moments thereof Sep. 29, 2009
7567997 Applications of cascading DSP slices Jul. 28, 2009
7516307 Processor for computing a packed sum of absolute differences and packed multiply-add Apr. 7, 2009
7480690 Arithmetic circuit with multiplexed addend inputs Jan. 20, 2009
7472155 Programmable logic device with cascading DSP slices Dec. 30, 2008
7467175 Programmable logic device with pipelined DSP slices Dec. 16, 2008
7437401 Multiplier-accumulator block mode splitting Oct. 14, 2008
7428566 Multipurpose functional unit with multiply-add and format conversion pipeline Sep. 23, 2008
7353244 Dual-multiply-accumulator operation optimized for even and odd multisample calculations Apr. 1, 2008
7231510 Pipelined multiply-accumulate unit and out-of-order completion logic for a superscalar digital signal processor and method of operation thereof Jun. 12, 2007
7225323 Multi-purpose floating point and integer multiply-add functional unit with multiplication-comparison test addition and exponent pipelines May. 29, 2007
7216217 Programmable processor with group floating-point operations May. 8, 2007
7206927 Pipelined processor method and circuit with interleaving of iterative operations Apr. 17, 2007
7181484 Extended-precision accumulation of multiplier output Feb. 20, 2007
7142010 Programmable logic device including multipliers and configurations thereof to reduce resource utilization Nov. 28, 2006
7127482 Performance optimized approach for efficient downsampling operations Oct. 24, 2006
7111166 Extending the range of computational fields of integers Sep. 19, 2006
7107305 Multiply-accumulate (MAC) unit for single-instruction/multiple-data (SIMD) instructions Sep. 12, 2006
7080113 Virtually parallel multiplier-accumulator Jul. 18, 2006
7043518 Method and system for performing parallel integer multiply accumulate operations on packed data May. 9, 2006
7043517 Multiply accumulator for two N bit multipliers and an M bit addend May. 9, 2006
7043519 SIMD sum of product arithmetic method and circuit, and semiconductor integrated circuit device equipped with the SIMD sum of product arithmetic circuit May. 9, 2006
7035890 Apparatus for multiplying and accumulating numeric quantities Apr. 25, 2006
7027597 Pre-computation and dual-pass modular arithmetic operation approach to implement encryption protocols efficiently in electronic integrated circuits Apr. 11, 2006
7027598 Residue number system based pre-computation and dual-pass arithmetic modular operation approach to implement encryption protocols efficiently in electronic integrated circuits Apr. 11, 2006
7013321 Methods and apparatus for performing parallel integer multiply accumulate operations Mar. 14, 2006
7010558 Data processor with enhanced instruction execution and method Mar. 7, 2006
6988184 Dyadic DSP instruction predecode signal selective multiplexing data from input buses to first and second plurality of functional blocks to execute main and sub operations Jan. 17, 2006
6976049 Method and apparatus for implementing single/dual packed multi-way addition instructions having accumulation options Dec. 13, 2005
6957242 Noninterfering multiply-MAC (multiply accumulate) circuit Oct. 18, 2005
6925480 Microarchitecture of an arithmetic unit Aug. 2, 2005
6857061 Method and apparatus for obtaining a scalar value directly from a vector register Feb. 15, 2005
6854003 Video frame rendering engine Feb. 8, 2005
6820102 DSP unit for multi-level global accumulation Nov. 16, 2004
6795553 Method and apparatus for modular inversion for information security and recording medium with a program for implementing the method Sep. 21, 2004
6792442 Signal processor and product-sum operating device for use therein with rounding function Sep. 14, 2004
6784888 Method and apparatus for executing a predefined instruction set Aug. 31, 2004
6754542 Control arithmetic apparatus and method Jun. 22, 2004
6745219 Arithmetic unit using stochastic data processing Jun. 1, 2004
6732132 Digital signal processor and digital signal processing system incorporating same May. 4, 2004
6728796 Arrangement and method for signal processing and storing Apr. 27, 2004
6693455 Programmable logic device including multipliers and configurations thereof to reduce resource utilization Feb. 17, 2004
6687810 Method and apparatus for staggering execution of a single packed data instruction using the same circuit Feb. 3, 2004
6658503 Parallel transfer size calculation and annulment determination in transfer controller with hub and ports Dec. 2, 2003
6643768 Dyadic DSP instruction processor with main and sub-operation functional blocks selected from each set of multiplier and adder Nov. 4, 2003
6631461 Dyadic DSP instructions for digital signal processors Oct. 7, 2003
6622153 Virtual parallel multiplier-accumulator Sep. 16, 2003
6611856 Processing multiply-accumulate operations in a single cycle Aug. 26, 2003
6609143 Method and apparatus for arithmetic operation Aug. 19, 2003

1 2 3


 
 
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