| |
 |
|
Class Information
Number: 708/513
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Floating point > Variable length or precision
Description: Subject matter wherein the numerical digits which constitute an operand are of selectable length or provide more detail.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7483936 |
Calculating unit |
Jan. 27, 2009 |
| 7472051 |
Dependable microcontroller, method for designing a dependable microcontroller and computer program product therefor |
Dec. 30, 2008 |
| 7397399 |
Method and device for transcoding N-bit words into M-bit words with M smaller N |
Jul. 8, 2008 |
| 7047271 |
DSP execution unit for efficient alternate modes for processing multiple data sizes |
May. 16, 2006 |
| 7043518 |
Method and system for performing parallel integer multiply accumulate operations on packed data |
May. 9, 2006 |
| 7039906 |
Compiler for enabling multiple signed independent data elements per register |
May. 2, 2006 |
| 6854001 |
Apparatus and method for simultaneously displaying a number along with its number of significant figures |
Feb. 8, 2005 |
| 6681236 |
Method of performing operations with a variable arithmetic |
Jan. 20, 2004 |
| 6629231 |
System and method for efficient register file conversion of denormal numbers between scalar and SIMD formats |
Sep. 30, 2003 |
| 6564238 |
Data processing apparatus and method for performing different word-length arithmetic operations |
May. 13, 2003 |
| 6557096 |
Processors with data typer and aligner selectively coupling data bits of data buses to adder and multiplier functional blocks to execute instructions with flexible data types |
Apr. 29, 2003 |
| 6523057 |
High-speed digital accumulator with wide dynamic range |
Feb. 18, 2003 |
| 6463525 |
Merging single precision floating point operands |
Oct. 8, 2002 |
| 6460135 |
Data type conversion based on comparison of type information of registers and execution result |
Oct. 1, 2002 |
| 6311199 |
Sign extension unit |
Oct. 30, 2001 |
| 6253299 |
Virtual cache registers with selectable width for accommodating different precision data formats |
Jun. 26, 2001 |
| 6163764 |
Emulation of an instruction set on an instruction set architecture transition |
Dec. 19, 2000 |
| 6138135 |
Propagating NaNs during high precision calculations using lesser precision hardware |
Oct. 24, 2000 |
| 6094719 |
Reducing data dependent conflicts by converting single precision instructions into microinstructions using renamed phantom registers in a processor having double precision registers |
Jul. 25, 2000 |
| 6049865 |
Method and apparatus for implementing floating point projection instructions |
Apr. 11, 2000 |
| 6044392 |
Method and apparatus for performing rounding in a data processor |
Mar. 28, 2000 |
| 5896543 |
Digital signal processor architecture |
Apr. 20, 1999 |
| 5809292 |
Floating point for simid array machine |
Sep. 15, 1998 |
| 5740093 |
128-bit register file and 128-bit floating point load and store for quadruple precision compatibility |
Apr. 14, 1998 |
| 5631859 |
Floating point arithmetic unit having logic for quad precision arithmetic |
May. 20, 1997 |
| 5619439 |
Shared hardware for multiply, divide, and square root exponent calculation |
Apr. 8, 1997 |
| 5602769 |
Method and apparatus for partially supporting subnormal operands in floating point multiplication |
Feb. 11, 1997 |
| 5523961 |
Converting biased exponents from single/double precision to extended precision without requiring an adder |
Jun. 4, 1996 |
| 5301139 |
Shifter circuit for multiple precision division |
Apr. 5, 1994 |
| 5268855 |
Common format for encoding both single and double precision floating point numbers |
Dec. 7, 1993 |
| 5182723 |
Computing method of floating-point represented data |
Jan. 26, 1993 |
| 4953119 |
Multiplier circuit with selectively interconnected pipelined multipliers for selectively multiplication of fixed and floating point numbers |
Aug. 28, 1990 |
| 4901267 |
Floating point circuit with configurable number of multiplier cycles and variable divide cycle ratio |
Feb. 13, 1990 |
| 4901268 |
Multiple function data processor |
Feb. 13, 1990 |
| 4884231 |
Microprocessor system with extended arithmetic logic unit |
Nov. 28, 1989 |
| 4847802 |
Method and apparatus for identifying the precision of an operand in a multiprecision floating-point processor |
Jul. 11, 1989 |
| 4839846 |
Apparatus for performing floating point arithmetic operations and rounding the result thereof |
Jun. 13, 1989 |
| 4788655 |
Condition code producing system |
Nov. 29, 1988 |
| 4780842 |
Cellular processor apparatus capable of performing floating point arithmetic operations |
Oct. 25, 1988 |
| 4768160 |
Arithmetic unit with simple overflow detection system |
Aug. 30, 1988 |
| 4760551 |
Operation unit for floating point data with variable exponent-part length |
Jul. 26, 1988 |
| 4758973 |
Apparatus for processing floating-point data having exponents of a variable length |
Jul. 19, 1988 |
| 4758975 |
Data processor capable of processing floating point data with exponent part of fixed or variable length |
Jul. 19, 1988 |
| 4748580 |
Multi-precision fixed/floating-point processor |
May. 31, 1988 |
| 4675809 |
Data processing system for floating point data having a variable length exponent part |
Jun. 23, 1987 |
| 4617641 |
Operation unit for floating point data having a variable length exponent part |
Oct. 14, 1986 |
| 4161784 |
Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands |
Jul. 17, 1979 |
|
|
|
