| |
 |
|
Class Information
Number: 708/505
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Floating point > Addition or subtraction
Description: Subject matter wherein the operation performed is addition or subtraction.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 4858165 |
Apparatus and method for acceleration of effective subtraction procedures by the approximation of the absolute value of the exponent argument difference |
Aug. 15, 1989 |
| 4852039 |
Apparatus and method for accelerating floating point addition and subtraction operations by accelerating the effective subtraction procedure |
Jul. 25, 1989 |
| 4849923 |
Apparatus and method for execution of floating point operations |
Jul. 18, 1989 |
| 4825400 |
Floating point accumulator circuit |
Apr. 25, 1989 |
| 4811272 |
Apparatus and method for an extended arithmetic logic unit for expediting selected floating point operations |
Mar. 7, 1989 |
| 4800516 |
High speed floating-point unit |
Jan. 24, 1989 |
| 4758974 |
Most significant digit location |
Jul. 19, 1988 |
| 4751665 |
Systolic super summation device |
Jun. 14, 1988 |
| 4719589 |
Floating-point adder circuit |
Jan. 12, 1988 |
| 4698771 |
Adder circuit for encoded PCM samples |
Oct. 6, 1987 |
| 4644490 |
Floating point data adder |
Feb. 17, 1987 |
| 4639887 |
Bifurcated method and apparatus for floating point addition with decreased latency time |
Jan. 27, 1987 |
| 4620292 |
Arithmetic logic unit for floating point data and/or fixed point data |
Oct. 28, 1986 |
| 4592006 |
Adder for floating point data suitable for digital signal processing |
May. 27, 1986 |
| 4511990 |
Digital processor with floating point multiplier and adder suitable for digital signal processing |
Apr. 16, 1985 |
| 4488252 |
Floating point addition architecture |
Dec. 11, 1984 |
| 4366548 |
Adder for exponent arithmetic |
Dec. 28, 1982 |
| 4308589 |
Apparatus for performing the scientific add instruction |
Dec. 29, 1981 |
| 4282582 |
Floating point processor architecture which performs subtraction with reduced number of guard bits |
Aug. 4, 1981 |
| 4075704 |
Floating point data processor for high speech operation |
Feb. 21, 1978 |
| 4054787 |
Apparatus for computing an arithmetically accumulated sequence of numbers |
Oct. 18, 1977 |
|
|
|