





Class Information
Number: 708/505
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Floating point > Addition or subtraction
Description: Subject matter wherein the operation performed is addition or subtraction.
Patents under this class:
Patent Number 
Title Of Patent 
Date Issued 
8713085 
Systems and methods for a signed magnitude adder in one's complement logic 
Apr. 29, 2014 
8645449 
Combined floating point adder and subtractor 
Feb. 4, 2014 
8630371 
Channel estimation using linear phase estimation 
Jan. 14, 2014 
8620983 
Leading sign digit predictor for floating point near subtractor 
Dec. 31, 2013 
8615542 
Multifunction floating point arithmetic pipeline 
Dec. 24, 2013 
8615540 
Arithmetic logic unit for use within a flight control system 
Dec. 24, 2013 
8601047 
Decimal floatingpoint adder with leading zero anticipation 
Dec. 3, 2013 
8554819 
System to implement floating point adder using mantissa, rounding, and normalization 
Oct. 8, 2013 
8549054 
Arithmetic processing apparatus and arithmetic processing method 
Oct. 1, 2013 
8489663 
Decimal floatingpoint adder with leading zero anticipation 
Jul. 16, 2013 
8489665 
Communication apparatus, method of checking received data size, multiple determining circuit, and multiple determination method 
Jul. 16, 2013 
8484267 
Weight normalization in hardware without a division operator 
Jul. 9, 2013 
8463835 
Circuit for and method of providing a floatingpoint adder 
Jun. 11, 2013 
8423600 
Accumulating operator and accumulating method for floating point operation 
Apr. 16, 2013 
8402075 
Mechanism for fast detection of overshift in a floating point unit of a processing device 
Mar. 19, 2013 
8380769 
Filter operation unit and motioncompensating device 
Feb. 19, 2013 
8332453 
Shifter with allone and allzero detection using a portion of partially shifted vector and shift amount in parallel to generated shifted result 
Dec. 11, 2012 
8250126 
Efficient leading zero anticipator 
Aug. 21, 2012 
8239438 
Method and apparatus for implementing a multiple operand vector floating point summation to scalar function 
Aug. 7, 2012 
8219604 
System and method for providing a double adder for decimal floating point operations 
Jul. 10, 2012 
8214417 
Subnormal number handling in floating point adder without detection of subnormal numbers before exponent subtraction 
Jul. 3, 2012 
8214416 
Floatingpoint addition acceleration 
Jul. 3, 2012 
8185570 
Threeterm input floatingpoint addersubtractor 
May. 22, 2012 
8170695 
Appliance incorporating load selectivity without employment of smart meters 
May. 1, 2012 
8166085 
Reducing the latency of sumaddressed shifters 
Apr. 24, 2012 
8161090 
Floatingpoint fused addsubtract unit 
Apr. 17, 2012 
8161091 
Method for performing decimal floating point addition 
Apr. 17, 2012 
8131795 
High speed adder design for a multiplyadd based floating point unit 
Mar. 6, 2012 
8069200 
Apparatus and method for implementing floating point additive and shift operations 
Nov. 29, 2011 
8060549 
Method and apparatus for accumulating floating point values 
Nov. 15, 2011 
8046400 
Apparatus and method for optimizing the performance of x87 floating point addition instructions in a microprocessor 
Oct. 25, 2011 
7991817 
Method and a circuit using an associative calculator for calculating a sequence of nonassociative operations 
Aug. 2, 2011 
7982496 
Busbased logic blocks with optional constant input 
Jul. 19, 2011 
7872497 
Flexible carry scheme for field programmable gate arrays 
Jan. 18, 2011 
7873688 
Processing method and computer system for summation of floating point data 
Jan. 18, 2011 
7814138 
Method and apparatus for decimal number addition using hardware for binary number operations 
Oct. 12, 2010 
7746100 
Flexible adder circuits with fast carry chain circuitry 
Jun. 29, 2010 
7720898 
Apparatus and method for adjusting exponents of floating point numbers 
May. 18, 2010 
7716264 
Method and apparatus for performing alignment shifting in a floatingpoint unit 
May. 11, 2010 
7707236 
Methods and apparatus for an efficient floating point ALU 
Apr. 27, 2010 
7668892 
Data processing apparatus and method for normalizing a data value 
Feb. 23, 2010 
7663400 
Flexible carry scheme for field programmable gate arrays 
Feb. 16, 2010 
7617268 
Method and apparatus supporting nonadditive calculations in graphics accelerators and digital signal processors 
Nov. 10, 2009 
7592835 
Coprocessor having configurable logic blocks 
Sep. 22, 2009 
7574584 
Splitting execution of a floatingpoint add instruction between an integer pipeline for performing mantissa addition and a hardware state machine 
Aug. 11, 2009 
7552165 
Method and system to implement an improved floating point adder with integrated adding and rounding 
Jun. 23, 2009 
7546328 
Decimal floatingpoint adder 
Jun. 9, 2009 
7519645 
System and method for performing decimal floating point addition 
Apr. 14, 2009 
7490119 
High speed adder design for a multiplyadd based floating point unit 
Feb. 10, 2009 
7475104 
System and method for providing a double adder for decimal floating point operations 
Jan. 6, 2009 








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