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Class Information
Number: 708/499
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Floating point > Compensation for finite word length > Sticky bit
Description: Subject matter wherein the modification is based on whether or not a number of least significant digits contains a one.


Patents under this class:

Patent Number Title Of Patent Date Issued
6516333 Sticky bit value predicting circuit Feb. 4, 2003
6490606 Rounding denormalized numbers in a pipelined floating point unit without pipeline stalls Dec. 3, 2002
6484251 Updating condition status register based on instruction specific modification information in set/clear pair upon instruction commit in out-of-order processor Nov. 19, 2002
6099158 Apparatus and methods for execution of computer instructions Aug. 8, 2000
6044391 Method of generating the sticky-bit from the input operands Mar. 28, 2000
5995992 Conditional truncation indicator control for a decimal numeric processor employing result truncation Nov. 30, 1999
5954789 Quotient digit selection logic for floating point division/square root Sep. 21, 1999
5944773 Floating-point multiplier circuit for generating the sticky-bit from the input operands Aug. 31, 1999
5941939 Logarithm/inverse-logarithm converter and method of using same Aug. 24, 1999
5880984 Method and apparatus for performing high-precision multiply-add calculations using independent multiply and add instruments Mar. 9, 1999
5805487 Method and system for fast determination of sticky and guard bits Sep. 8, 1998
5798958 Zero detect for binary sum Aug. 25, 1998
5787030 Correct and efficient sticky bit calculation for exact floating point divide/square root results Jul. 28, 1998
5771183 Apparatus and method for computation of sticky bit in a multi-stage shifter used for floating point arithmetic Jun. 23, 1998
5764555 Method and system of rounding for division or square root: eliminating remainder calculation Jun. 9, 1998
5757682 Parallel calculation of exponent and sticky bit during normalization May. 26, 1998
5754458 Trailing bit anticipator May. 19, 1998
5742537 Fast determination of floating point sticky bit from input operands Apr. 21, 1998
5742536 Parallel calculation of exponent and sticky bit during normalization Apr. 21, 1998
5742535 Parallel calculation of exponent and sticky bit during normalization Apr. 21, 1998
5694350 Rounding adder for floating point processor Dec. 2, 1997
5687106 Implementation of binary floating point using hexadecimal floating point unit Nov. 11, 1997
5627774 Parallel calculation of exponent and sticky bit during normalization May. 6, 1997
5627773 Floating point unit data path alignment May. 6, 1997
5471410 Method and apparatus for sticky and leading one detection Nov. 28, 1995
5432727 Apparatus for computing a sticky bit for a floating point arithmetic unit Jul. 11, 1995
5430668 Floating point multiplier capable of easily performing a failure detection test Jul. 4, 1995
5341319 Method and apparatus for controlling a rounding operation in a floating point multiplier circuit Aug. 23, 1994
5260889 Computation of sticky-bit in parallel with partial products in a floating point multiplier unit Nov. 9, 1993
5258943 Apparatus and method for rounding operands Nov. 2, 1993
5245563 Fast control for round unit Sep. 14, 1993
5235533 Store rounding in a floating point unit Aug. 10, 1993
H1222 Apparatus for determining sticky bit value in arithmetic operations Aug. 3, 1993
5212661 Apparatus for performing floating point arithmetic operation and rounding the result thereof May. 18, 1993
4928259 Sticky bit predictor for floating-point multiplication May. 22, 1990
4864527 Apparatus and method for using a single carry chain for leading one detection and for "sticky" bit calculation Sep. 5, 1989



 
 
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