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Class Information
Number: 708/497
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Floating point > Compensation for finite word length > Round off or truncation
Description: Subject matter wherein the modification is a deletion of one or more of the least significant digits and an adjustment of the more significant digits in accordance with some specific rule.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 4849923 |
Apparatus and method for execution of floating point operations |
Jul. 18, 1989 |
| 4839846 |
Apparatus for performing floating point arithmetic operations and rounding the result thereof |
Jun. 13, 1989 |
| 4796217 |
Rounding unit for use in arithmetic processing of floating point data |
Jan. 3, 1989 |
| 4779220 |
Floating-point data rounding and normalizing circuit |
Oct. 18, 1988 |
| 4758972 |
Precision rounding in a floating point arithmetic unit |
Jul. 19, 1988 |
| 4562553 |
Floating point arithmetic system and method with rounding anticipation |
Dec. 31, 1985 |
| 4468748 |
Floating point computation unit having means for rounding the floating point computation result |
Aug. 28, 1984 |
| 4442498 |
Arithmetic unit for use in data processing systems |
Apr. 10, 1984 |
| 4386413 |
Method and apparatus of providing a result of a numerical calculation with the number of exact significant figures |
May. 31, 1983 |
| 4367536 |
Arrangement for determining number of exact significant figures in calculated result |
Jan. 4, 1983 |
| 4305134 |
Automatic operand length control of the result of a scientific arithmetic operation |
Dec. 8, 1981 |
| 4295203 |
Automatic rounding of floating point operands |
Oct. 13, 1981 |
| 4229800 |
Round off correction logic for modified Booth's algorithm |
Oct. 21, 1980 |
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