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Class Information
Number: 708/497
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Floating point > Compensation for finite word length > Round off or truncation
Description: Subject matter wherein the modification is a deletion of one or more of the least significant digits and an adjustment of the more significant digits in accordance with some specific rule.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6148314 |
Round increment in an adder circuit |
Nov. 14, 2000 |
| 6134574 |
Method and apparatus for achieving higher frequencies of exactly rounded results |
Oct. 17, 2000 |
| 6122651 |
Method and apparatus for performing overshifted rotate through carry instructions by shifting in opposite directions |
Sep. 19, 2000 |
| 6099158 |
Apparatus and methods for execution of computer instructions |
Aug. 8, 2000 |
| 6044392 |
Method and apparatus for performing rounding in a data processor |
Mar. 28, 2000 |
| 5995992 |
Conditional truncation indicator control for a decimal numeric processor employing result truncation |
Nov. 30, 1999 |
| 5954789 |
Quotient digit selection logic for floating point division/square root |
Sep. 21, 1999 |
| 5917741 |
Method and apparatus for performing floating-point rounding operations for multiple precisions using incrementers |
Jun. 29, 1999 |
| 5909385 |
Multiplying method and apparatus |
Jun. 1, 1999 |
| 5886195 |
Thienyl compounds for inhibition of cell proliferative disorders |
Mar. 23, 1999 |
| 5880984 |
Method and apparatus for performing high-precision multiply-add calculations using independent multiply and add instruments |
Mar. 9, 1999 |
| 5854758 |
Fast fourier transformation computing unit and a fast fourier transformation computation device |
Dec. 29, 1998 |
| 5841683 |
Least significant bit and guard bit extractor |
Nov. 24, 1998 |
| 5812439 |
Technique of incorporating floating point information into processor instructions |
Sep. 22, 1998 |
| 5808926 |
Floating point addition methods and apparatus |
Sep. 15, 1998 |
| 5764555 |
Method and system of rounding for division or square root: eliminating remainder calculation |
Jun. 9, 1998 |
| 5761103 |
Left and right justification of single precision mantissa in a double precision rounding unit |
Jun. 2, 1998 |
| 5754458 |
Trailing bit anticipator |
May. 19, 1998 |
| 5748516 |
Floating point processing unit with forced arithmetic results |
May. 5, 1998 |
| 5742537 |
Fast determination of floating point sticky bit from input operands |
Apr. 21, 1998 |
| 5696711 |
Apparatus and method for performing variable precision floating point rounding operations |
Dec. 9, 1997 |
| 5696709 |
Program controlled rounding modes |
Dec. 9, 1997 |
| 5694350 |
Rounding adder for floating point processor |
Dec. 2, 1997 |
| 5627773 |
Floating point unit data path alignment |
May. 6, 1997 |
| 5568412 |
Rounding-off method and apparatus of floating point arithmetic apparatus for addition/subtraction |
Oct. 22, 1996 |
| 5550768 |
Rounding normalizer for floating point arithmetic operations |
Aug. 27, 1996 |
| 5548544 |
Method and apparatus for rounding the result of an arithmetic operation |
Aug. 20, 1996 |
| 5511016 |
Method for store rounding and circuit therefor |
Apr. 23, 1996 |
| 5508948 |
Numeric representation converting apparatus and vector processor unit such apparatus |
Apr. 16, 1996 |
| 5469377 |
Floating point computing device for simplifying procedures accompanying addition or subtraction by detecting whether all of the bits of the digits of the mantissa are 0 or 1 |
Nov. 21, 1995 |
| 5434809 |
Method and apparatus for performing floating point arithmetic operation and rounding the result thereof |
Jul. 18, 1995 |
| 5430668 |
Floating point multiplier capable of easily performing a failure detection test |
Jul. 4, 1995 |
| 5408426 |
Arithmetic unit capable of performing concurrent operations for high speed operation |
Apr. 18, 1995 |
| 5390134 |
System and method for reducing latency in a floating point processor |
Feb. 14, 1995 |
| 5341319 |
Method and apparatus for controlling a rounding operation in a floating point multiplier circuit |
Aug. 23, 1994 |
| 5313415 |
Method and apparatus for performing floating point arithmetic operation and rounding the result thereof |
May. 17, 1994 |
| 5303175 |
Floating point arithmetic unit |
Apr. 12, 1994 |
| 5289396 |
Floating point processor with high speed rounding circuit |
Feb. 22, 1994 |
| 5276634 |
Floating point data processing apparatus which simultaneously effects summation and rounding computations |
Jan. 4, 1994 |
| 5258943 |
Apparatus and method for rounding operands |
Nov. 2, 1993 |
| 5235533 |
Store rounding in a floating point unit |
Aug. 10, 1993 |
| 5222037 |
Floating-point processor for performing an arithmetic operation on fixed-point part data with high speed rounding of a result |
Jun. 22, 1993 |
| 5212661 |
Apparatus for performing floating point arithmetic operation and rounding the result thereof |
May. 18, 1993 |
| 5150319 |
Circuitry for rounding in a floating point multiplier |
Sep. 22, 1992 |
| 5128889 |
Floating-point arithmetic apparatus with compensation for mantissa truncation |
Jul. 7, 1992 |
| 5122981 |
Floating point processor with high speed rounding circuit |
Jun. 16, 1992 |
| 5040138 |
Circuit for simultaneous arithmetic calculation and normalization estimation |
Aug. 13, 1991 |
| 4977535 |
Method of computation of normalized numbers |
Dec. 11, 1990 |
| 4941120 |
Floating point normalization and rounding prediction circuit |
Jul. 10, 1990 |
| 4926370 |
Method and apparatus for processing postnormalization and rounding in parallel |
May. 15, 1990 |
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