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Class Information
Number: 708/497
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Floating point > Compensation for finite word length > Round off or truncation
Description: Subject matter wherein the modification is a deletion of one or more of the least significant digits and an adjustment of the more significant digits in accordance with some specific rule.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7493357 |
Random carry-in for floating-point operations |
Feb. 17, 2009 |
| 7346642 |
Arithmetic processor utilizing multi-table look up to obtain reciprocal operands |
Mar. 18, 2008 |
| 7155471 |
Method and system for determining the correct rounding of a function |
Dec. 26, 2006 |
| 7069288 |
Floating point system with improved support of interval arithmetic |
Jun. 27, 2006 |
| 7069289 |
Floating point unit for detecting and representing inexact computations without flags or traps |
Jun. 27, 2006 |
| 7062525 |
Circuit and method for normalizing and rounding floating-point results and processor incorporating the circuit or the method |
Jun. 13, 2006 |
| 7058830 |
Power saving in a floating point unit using a multiplier and aligner bypass |
Jun. 6, 2006 |
| 7047272 |
Rounding mechanisms in processors |
May. 16, 2006 |
| 7024052 |
Motion image decoding apparatus and method reducing error accumulation and hence image degradation |
Apr. 4, 2006 |
| 7003539 |
Efficiently determining a floor for a floating-point number |
Feb. 21, 2006 |
| 6996596 |
Floating-point processor with operating mode having improved accuracy and high performance |
Feb. 7, 2006 |
| 6988120 |
Arithmetic unit and method thereof |
Jan. 17, 2006 |
| 6970897 |
Self-timed transmission system and method for processing multiple data sets |
Nov. 29, 2005 |
| 6963896 |
Method and system to implement an improved floating point adder with integrated adding and rounding |
Nov. 8, 2005 |
| 6941335 |
Random carry-in for floating-point operations |
Sep. 6, 2005 |
| 6898614 |
Round-off algorithm without bias for 2's complement data |
May. 24, 2005 |
| 6889242 |
Rounding operations in computer processor |
May. 3, 2005 |
| 6820106 |
Method and apparatus for improving the performance of a floating point multiplier accumulator |
Nov. 16, 2004 |
| 6804354 |
Cryptographic isolator using multiplication |
Oct. 12, 2004 |
| 6760036 |
Extended precision visual system |
Jul. 6, 2004 |
| 6721772 |
Rounding denormalized numbers in a pipelined floating point unit without pipeline stalls |
Apr. 13, 2004 |
| 6684232 |
Method and predictor for streamlining execution of convert-to-integer operations |
Jan. 27, 2004 |
| 6668268 |
Method and apparatus for compiling dependent subtraction operations on arithmetic intervals |
Dec. 23, 2003 |
| 6615228 |
Selection based rounding system and method for floating point operations |
Sep. 2, 2003 |
| 6571264 |
Floating-point arithmetic device |
May. 27, 2003 |
| 6560623 |
Method and apparatus for producing correctly rounded values of functions using double precision operands |
May. 6, 2003 |
| 6535898 |
Fast floating-point truncation to integer form |
Mar. 18, 2003 |
| 6510446 |
Floating point calculation method and unit efficiently representing floating point data as integer and semiconductor integrated circuit device provided with the same |
Jan. 21, 2003 |
| 6493738 |
Apparatus and method for rounding numerical values according to significant digits or rounding interval |
Dec. 10, 2002 |
| 6490606 |
Rounding denormalized numbers in a pipelined floating point unit without pipeline stalls |
Dec. 3, 2002 |
| 6427160 |
Method and system for testing floating point logic |
Jul. 30, 2002 |
| 6427203 |
Accurate high speed digital signal processor |
Jul. 30, 2002 |
| 6405231 |
Method and apparatus for rounding intermediate normalized mantissas within a floating-point processor |
Jun. 11, 2002 |
| 6401107 |
Method and processor for reducing computational error in a processor having no rounding support |
Jun. 4, 2002 |
| 6397238 |
Method and apparatus for rounding in a multiplier |
May. 28, 2002 |
| 6366942 |
Method and apparatus for rounding floating point results in a digital processing system |
Apr. 2, 2002 |
| 6356927 |
System and method for floating-point computation |
Mar. 12, 2002 |
| 6314442 |
Floating-point arithmetic unit which specifies a least significant bit to be incremented |
Nov. 6, 2001 |
| 6292815 |
Data conversion between floating point packed format and integer scalar format |
Sep. 18, 2001 |
| 6269385 |
Apparatus and method for performing rounding and addition in parallel in floating point multiplier |
Jul. 31, 2001 |
| 6269384 |
Method and apparatus for rounding and normalizing results within a multiplier |
Jul. 31, 2001 |
| 6263420 |
Digital signal processor particularly suited for decoding digital audio |
Jul. 17, 2001 |
| 6233672 |
Piping rounding mode bits with floating point instructions to eliminate serialization |
May. 15, 2001 |
| 6219684 |
Optimized rounding in underflow handlers |
Apr. 17, 2001 |
| 6205461 |
Floating point arithmetic logic unit leading zero count using fast approximate rounding |
Mar. 20, 2001 |
| 6199089 |
Floating point arithmetic logic unit rounding using at least one least significant bit |
Mar. 6, 2001 |
| 6185593 |
Method and apparatus for parallel normalization and rounding technique for floating point arithmetic operations |
Feb. 6, 2001 |
| 6175847 |
Shifting for parallel normalization and rounding technique for floating point arithmetic operations |
Jan. 16, 2001 |
| 6173299 |
Method and apparatus for selecting an intermediate result for parallel normalization and rounding technique for floating point arithmetic operations |
Jan. 9, 2001 |
| 6151615 |
Method and apparatus for formatting an intermediate result for parallel normalization and rounding technique for floating point arithmetic operations |
Nov. 21, 2000 |
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