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Class Information
Number: 708/495
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Arithmetical operation > Floating point
Description: Subject matter wherein the numerical digits are expressed in terms of a bounded number (mantissa) and a scale factor (characteristic or exponent) consisting of a power of the number base.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5918062 |
Microprocessor including an efficient implemention of an accumulate instruction |
Jun. 29, 1999 |
| 5896543 |
Digital signal processor architecture |
Apr. 20, 1999 |
| 5889980 |
Mode independent support of format conversion instructions for hexadecimal and binary floating point processing |
Mar. 30, 1999 |
| 5887160 |
Method and apparatus for communicating integer and floating point data over a shared data path in a single instruction pipeline processor |
Mar. 23, 1999 |
| 5886915 |
Method and apparatus for trading performance for precision when processing denormal numbers in a computer system |
Mar. 23, 1999 |
| 5856831 |
Clamping system and method for clamping floating point color values from a geometry accelerator in a computer graphics system |
Jan. 5, 1999 |
| 5850346 |
System for embedding hidden source information in three-dimensional computer model data |
Dec. 15, 1998 |
| 5848284 |
Method of transferring data between moderately coupled integer and floating point units |
Dec. 8, 1998 |
| 5844827 |
Arithmetic shifter that performs multiply/divide by two to the nth power for positive and negative N |
Dec. 1, 1998 |
| 5844830 |
Executing computer instrucrions by circuits having different latencies |
Dec. 1, 1998 |
| 5825678 |
Method and apparatus for determining floating point data class |
Oct. 20, 1998 |
| 5805486 |
Moderately coupled floating point and integer units |
Sep. 8, 1998 |
| 5805475 |
Load-store unit and method of loading and storing single-precision floating-point registers in a double-precision architecture |
Sep. 8, 1998 |
| 5781464 |
Apparatus and method for incrementing floating-point numbers represented in diffrent precision modes |
Jul. 14, 1998 |
| 5768169 |
Method and apparatus for improved processing of numeric applications in the presence of subnormal numbers in a computer system |
Jun. 16, 1998 |
| 5764548 |
Fast floating-point to integer conversion |
Jun. 9, 1998 |
| 5734879 |
Saturation instruction in a data processor |
Mar. 31, 1998 |
| 5732005 |
Single-precision, floating-point register array for floating-point units performing double-precision operations by emulation |
Mar. 24, 1998 |
| 5729724 |
Adaptive 128-bit floating point load and store operations for quadruple precision compatibility |
Mar. 17, 1998 |
| 5687359 |
Floating point processor supporting hexadecimal and binary modes using common instructions with memory storing a pair of representations for each value |
Nov. 11, 1997 |
| 5678016 |
Processor and method for managing execution of an instruction which determine subsequent to dispatch if an instruction is subject to serialization |
Oct. 14, 1997 |
| 5668984 |
Variable stage load path and method of operation |
Sep. 16, 1997 |
| 5666301 |
Multiplier carrying out numeric calculation at high speed |
Sep. 9, 1997 |
| 5583805 |
Floating-point processor having post-writeback spill stage |
Dec. 10, 1996 |
| 5574928 |
Mixed integer/floating point processor core for a superscalar microprocessor with a plurality of operand buses for transferring operand segments |
Nov. 12, 1996 |
| 5548545 |
Floating point exception prediction for compound operations and variable precision using an intermediate exponent bus |
Aug. 20, 1996 |
| 5487022 |
Normalization method for floating point numbers |
Jan. 23, 1996 |
| 5481489 |
Method of and apparatus for discriminating NaN |
Jan. 2, 1996 |
| 5463574 |
Apparatus for argument reduction in exponential computations of IEEE standard floating-point numbers |
Oct. 31, 1995 |
| 5452241 |
System for optimizing argument reduction |
Sep. 19, 1995 |
| 5400271 |
Apparatus for and method of calculating sum of products |
Mar. 21, 1995 |
| 5392228 |
Result normalizer and method of operation |
Feb. 21, 1995 |
| 5339266 |
Parallel method and apparatus for detecting and completing floating point operations involving special operands |
Aug. 16, 1994 |
| 5272654 |
System for converting a floating point signed magnitude binary number to a two's complement binary number |
Dec. 21, 1993 |
| 5257214 |
Qualification of register file write enables using self-timed floating point exception flags |
Oct. 26, 1993 |
| 5253193 |
Computer method and apparatus for storing a datum representing a physical unit |
Oct. 12, 1993 |
| 5204825 |
Method and apparatus for exact leading zero prediction for a floating-point adder |
Apr. 20, 1993 |
| 5181186 |
TPC computers |
Jan. 19, 1993 |
| 5161117 |
Floating point conversion device and method |
Nov. 3, 1992 |
| 5144570 |
Normalization estimator |
Sep. 1, 1992 |
| 5109417 |
Low bit rate transform coder, decoder, and encoder/decoder for high-quality audio |
Apr. 28, 1992 |
| 5099446 |
Data transfer apparatus and data transfer system |
Mar. 24, 1992 |
| 5038309 |
Number conversion apparatus |
Aug. 6, 1991 |
| 5029123 |
Information processing device capable of indicating performance |
Jul. 2, 1991 |
| 5021985 |
Variable latency method and apparatus for floating-point coprocessor |
Jun. 4, 1991 |
| 4951238 |
Processor for executing arithmetic operations on input data and constant data with a small error |
Aug. 21, 1990 |
| 4870608 |
Method and apparatus for floating point operation |
Sep. 26, 1989 |
| 4858166 |
Method and structure for performing floating point comparison |
Aug. 15, 1989 |
| 4811272 |
Apparatus and method for an extended arithmetic logic unit for expediting selected floating point operations |
Mar. 7, 1989 |
| 4807172 |
Variable shift-count bidirectional shift control circuit |
Feb. 21, 1989 |
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