| Patent Number |
Title Of Patent |
Date Issued |
| 7562106 |
Multi-value digital calculating circuits, including multipliers |
Jul. 14, 2009 |
| 7543008 |
Apparatus and method for providing higher radix redundant digit lookup tables for recoding and compressing function values |
Jun. 2, 2009 |
| 7461107 |
Converter circuit for converting 1-redundant representation of an integer |
Dec. 2, 2008 |
| 7433905 |
Device and method for processing digital values in particular in non-adjacent form |
Oct. 7, 2008 |
| 7296048 |
Semiconductor circuit for arithmetic processing and arithmetic processing method |
Nov. 13, 2007 |
| 7257609 |
Multiplier and shift device using signed digit representation |
Aug. 14, 2007 |
| 7213043 |
Sparce-redundant fixed point arithmetic modules |
May. 1, 2007 |
| 7155474 |
Current-mode multi-valued full adder in semiconductor device |
Dec. 26, 2006 |
| 7099851 |
Applying term consistency to an equality constrained interval global optimization problem |
Aug. 29, 2006 |
| 6970994 |
Executing partial-width packed data instructions |
Nov. 29, 2005 |
| 6816877 |
Apparatus for digital multiplication using redundant binary arithmetic |
Nov. 9, 2004 |
| 6728745 |
Semiconductor circuit for arithmetic operation and method of arithmetic operation |
Apr. 27, 2004 |
| 6671710 |
Methods of computing with digital multistate phase change materials |
Dec. 30, 2003 |
| 6567835 |
Method and apparatus for a 5:2 carry-save-adder (CSA) |
May. 20, 2003 |
| 6557021 |
Rounding anticipator for floating point operations |
Apr. 29, 2003 |
| 6546410 |
High-speed hexadecimal adding method and system |
Apr. 8, 2003 |
| 6360241 |
Computer method and apparatus for division and square root operations using signed digit |
Mar. 19, 2002 |
| 6347327 |
Method and apparatus for N-nary incrementor |
Feb. 12, 2002 |
| 6232894 |
Reproducible data conversion and/or compression method of digital signals and a data converter and a digital computer |
May. 15, 2001 |
| 6223195 |
Discrete cosine high-speed arithmetic unit and related arithmetic unit |
Apr. 24, 2001 |
| 6223199 |
Method and apparatus for an N-NARY HPG gate |
Apr. 24, 2001 |
| 6219687 |
Method and apparatus for an N-nary Sum/HPG gate |
Apr. 17, 2001 |
| 6219686 |
Method and apparatus for an N-NARY sum/HPG adder/subtractor gate |
Apr. 17, 2001 |
| 6216146 |
Method and apparatus for an N-nary adder gate |
Apr. 10, 2001 |
| 6192387 |
Multiple resonant tunneling circuits for signed digit multivalued logic operations |
Feb. 20, 2001 |
| 6073149 |
Computational circuit |
Jun. 6, 2000 |
| 6047302 |
Memory storing redundant binary codes and arithmetic unit and discrete cosine transformer using such memory |
Apr. 4, 2000 |
| 6029185 |
Discrete cosine high-speed arithmetic unit and related arithmetic unit |
Feb. 22, 2000 |
| 5999962 |
Divider which iteratively multiplies divisor and dividend by multipliers generated from the divisors to compute the intermediate divisors and quotients |
Dec. 7, 1999 |
| 5917742 |
Semiconductor arithmetic circuit |
Jun. 29, 1999 |
| 5822233 |
Digital arithmetic calculator and digital computer using non-redundant (2N+1) notation system with a radix of (2N+1) |
Oct. 13, 1998 |
| 5815422 |
Computer-implemented multiplication with shifting of pattern-product partials |
Sep. 29, 1998 |
| 5815420 |
Microprocessor arithmetic logic unit using multiple number representations |
Sep. 29, 1998 |
| 5768476 |
Parallel multi-value neural networks |
Jun. 16, 1998 |
| 5767476 |
Manufacturing method for automotive frame |
Jun. 16, 1998 |
| 5680339 |
Method for rounding using redundant coded multiply result |
Oct. 21, 1997 |
| 5659495 |
Numeric processor including a multiply-add circuit for computing a succession of product sums using redundant values without conversion to nonredundant format |
Aug. 19, 1997 |
| 5644522 |
Method, apparatus and system for multiply rounding using redundant coded multiply result |
Jul. 1, 1997 |
| 5574940 |
Data processor with quicker latch input timing of valid data |
Nov. 12, 1996 |
| 5572455 |
Adder-subtractor device and method for making the same |
Nov. 5, 1996 |
| 5570309 |
Iterative arithmetic processor |
Oct. 29, 1996 |
| 5524088 |
Multi-functional operating circuit providing capability of freely combining operating functions |
Jun. 4, 1996 |
| 5483477 |
Multiplying circuit and microcomputer including the same |
Jan. 9, 1996 |
| 5469163 |
Multiple resonant tunneling circuits for positive digit range-4 base-2 to binary conversion |
Nov. 21, 1995 |
| 5467298 |
Multivalued adder having capability of sharing plural multivalued signals |
Nov. 14, 1995 |
| 5467299 |
Divider and microcomputer including the same |
Nov. 14, 1995 |
| 5463572 |
Multi-nary and logic device |
Oct. 31, 1995 |
| 5463573 |
Multivalued subtracter having capability of sharing plural multivalued signals |
Oct. 31, 1995 |
| 5463571 |
Multi-nary OR logic device |
Oct. 31, 1995 |
| 5438533 |
Multivalued multiplier for binary and multivalued logic data |
Aug. 1, 1995 |
