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Class Information
Number: 708/319
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Filtering > Transversal
Description: Subject matter in which feedforward processing of present inputs is utilized.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7603401 |
Method and system for on-line blind source separation |
Oct. 13, 2009 |
| 7590675 |
Digital filter, design method thereof, design device, and digital filter design program |
Sep. 15, 2009 |
| 7590676 |
Programmable logic device with specialized multiplier blocks |
Sep. 15, 2009 |
| 7587441 |
Systems and methods for weighted overlap and add processing |
Sep. 8, 2009 |
| 7584236 |
Movable tap finite impulse response filter |
Sep. 1, 2009 |
| 7584235 |
Variable passband autoregressive moving average filter |
Sep. 1, 2009 |
| 7565389 |
Method for determining filter coefficients of a digital filter and digital filter |
Jul. 21, 2009 |
| 7548941 |
Digital filter using memory to emulate variable shift register |
Jun. 16, 2009 |
| 7529788 |
Digital filter design method and device, digital filter design program, and digital filter |
May. 5, 2009 |
| 7509364 |
Partial output finite impulse response filter |
Mar. 24, 2009 |
| 7493354 |
FIR filter tap architecture for highly dense layout |
Feb. 17, 2009 |
| 7492848 |
Method and apparatus for efficient multi-stage FIR filters |
Feb. 17, 2009 |
| 7461113 |
Reduced complexity adaptive filter |
Dec. 2, 2008 |
| 7454453 |
Methods, systems, and computer program products for parallel correlation and applications thereof |
Nov. 18, 2008 |
| 7412471 |
Discrete filter having a tap selection circuit |
Aug. 12, 2008 |
| 7409418 |
Linearly scalable finite impulse response filter |
Aug. 5, 2008 |
| 7409417 |
Polyphase filter with optimized silicon area |
Aug. 5, 2008 |
| 7395291 |
Multiplierless correlators for HIPERLAN/2 and IEEE 802.11A wireless local area networks |
Jul. 1, 2008 |
| 7386581 |
Performance FIR filter |
Jun. 10, 2008 |
| 7353244 |
Dual-multiply-accumulator operation optimized for even and odd multisample calculations |
Apr. 1, 2008 |
| 7353243 |
Reconfigurable filter node for an adaptive computing machine |
Apr. 1, 2008 |
| 7330865 |
Digital filter and its designing method |
Feb. 12, 2008 |
| 7286006 |
Sign-sign least means square filter |
Oct. 23, 2007 |
| 7263542 |
Inverse filtering method, synthesis filtering method, inverse filter device, synthesis filter device and devices comprising such filter devices |
Aug. 28, 2007 |
| 7254598 |
Finite impulse response filter and digital signal receiving apparatus |
Aug. 7, 2007 |
| 7251274 |
Multichannel adaptive equaliser |
Jul. 31, 2007 |
| 7248629 |
Efficient FIR filter for high-speed communication |
Jul. 24, 2007 |
| 7233969 |
Method and apparatus for a parallel correlator and applications thereof |
Jun. 19, 2007 |
| 7225214 |
Digital filter realization |
May. 29, 2007 |
| 7222144 |
Weight measurement apparatus, method of eliminating noise and method of designing digital filter |
May. 22, 2007 |
| 7188135 |
Analog adaptive FIR filter having independent coefficient sets for each filter tap |
Mar. 6, 2007 |
| 7167883 |
Filter with multipliers operating in ones complement arithmetic |
Jan. 23, 2007 |
| 7152087 |
Finite impulse response filter |
Dec. 19, 2006 |
| 7127481 |
Movable tap finite impulse response filter |
Oct. 24, 2006 |
| 7120656 |
Movable tap finite impulse response filter |
Oct. 10, 2006 |
| 7107302 |
Finite impulse response filter algorithm for implementation on digital signal processor having dual execution units |
Sep. 12, 2006 |
| 7107301 |
Method and apparatus for reducing latency in a digital signal processing device |
Sep. 12, 2006 |
| RE39283 |
Method for selective filtering |
Sep. 12, 2006 |
| 7099420 |
Block interpolation filter structure using lookup table |
Aug. 29, 2006 |
| 7085795 |
Apparatus and method for efficient filtering and convolution of content data |
Aug. 1, 2006 |
| 7080108 |
Discrete filter having a tap selection circuit |
Jul. 18, 2006 |
| 7054896 |
Method for implementing a multiplier-less FIR filter |
May. 30, 2006 |
| 7043513 |
Clock balanced segmentation digital filter provided with optimun area of data path |
May. 9, 2006 |
| 7028061 |
FIR filter and setting method of coefficient thereof |
Apr. 11, 2006 |
| 7028062 |
FIR filter, method of operating the same, semiconductor integrated circuit including FIR filter, and communication system for transmitting data filtered by FIR filter |
Apr. 11, 2006 |
| 7024440 |
Method and system for processing a discrete time input signal where the clock rate of a discrete time output signal is a multiple of the clock rate of input signal samples |
Apr. 4, 2006 |
| 7016926 |
Low power CSD linear phase FIR filter architecture using vertical common subexpression and filter design method therefor |
Mar. 21, 2006 |
| 7013319 |
Digital filter methods and structures for increased processing rates |
Mar. 14, 2006 |
| 7010559 |
Method and apparatus for a parallel correlator and applications thereof |
Mar. 7, 2006 |
| 7010030 |
Software definable block adaptive decision feedback equalizer |
Mar. 7, 2006 |
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