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Class Information
Number: 708/235
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Multifunctional > Uses look-up table
Description: Subject matter wherein the operation involves a look-up table to search for a desired item of information.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7565388 |
Logic cell supporting addition of three binary words |
Jul. 21, 2009 |
| 7558812 |
Structures for LUT-based arithmetic in PLDs |
Jul. 7, 2009 |
| 7532975 |
Imaging apparatus for vehicles |
May. 12, 2009 |
| 7336099 |
Multiplexer including addition element |
Feb. 26, 2008 |
| 7322032 |
Methods and apparatus for scheduling operation of a data source |
Jan. 22, 2008 |
| 7271617 |
Electronic circuit with array of programmable logic cells |
Sep. 18, 2007 |
| 7251672 |
Reconfigurable logic device |
Jul. 31, 2007 |
| 7205791 |
Bypass-able carry chain in a programmable logic device |
Apr. 17, 2007 |
| 7196541 |
Electronic circuit with array of programmable logic cells |
Mar. 27, 2007 |
| 7193433 |
Programmable logic block having lookup table with partial output signal driving carry multiplexer |
Mar. 20, 2007 |
| 7185035 |
Arithmetic structures for programmable logic devices |
Feb. 27, 2007 |
| 7164288 |
Electronic circuit with array of programmable logic cells |
Jan. 16, 2007 |
| 7142670 |
Space-efficient, side-channel attack resistant table lookups |
Nov. 28, 2006 |
| 6961741 |
Look-up table apparatus to perform two-bit arithmetic operation including carry generation |
Nov. 1, 2005 |
| 6938062 |
Apparatus and method for providing higher radix redundant digit lookup tables for recoding and compressing function values |
Aug. 30, 2005 |
| 6904442 |
Method of implementing logic functions using a look-up-table |
Jun. 7, 2005 |
| 6900747 |
Method of compressing lookup table for reducing memory, non-linear function generating apparatus having lookup table compressed using the method, and non-linear function generating method |
May. 31, 2005 |
| 6708191 |
Configurable logic block with and gate for efficient multiplication in FPGAS |
Mar. 16, 2004 |
| 6476634 |
ALU implementation in single PLD logic cell |
Nov. 5, 2002 |
| 6466829 |
Table look-up method for dynamic control |
Oct. 15, 2002 |
| 6442437 |
Method for step motor control |
Aug. 27, 2002 |
| 6427156 |
Configurable logic block with AND gate for efficient multiplication in FPGAS |
Jul. 30, 2002 |
| 6288570 |
Logic structure and circuit for fast carry |
Sep. 11, 2001 |
| 6119048 |
Integrated circuit for processing digital signal |
Sep. 12, 2000 |
| 6065328 |
Apparatus and method for determining thermophysical properties using an isobaric approach |
May. 23, 2000 |
| 5943248 |
w-bit non-linear combiner for pseudo-random number generation |
Aug. 24, 1999 |
| RE35977 |
Look up table implementation of fast carry arithmetic and exclusive-or operations |
Dec. 1, 1998 |
| 5761099 |
Programmable logic array integrated circuits with enhanced carry routing |
Jun. 2, 1998 |
| 5724276 |
Logic block structure optimized for sum generation |
Mar. 3, 1998 |
| 5642304 |
Apparatus for high-speed solution of arbitrary mathematical expressions with logic code generator and programmable logic circuit |
Jun. 24, 1997 |
| 5602769 |
Method and apparatus for partially supporting subnormal operands in floating point multiplication |
Feb. 11, 1997 |
| 5481489 |
Method of and apparatus for discriminating NaN |
Jan. 2, 1996 |
| 5481486 |
Look up table implementation of fast carry arithmetic and exclusive-OR operations |
Jan. 2, 1996 |
| 5317527 |
Leading one/zero bit detector for floating point operation |
May. 31, 1994 |
| 5289396 |
Floating point processor with high speed rounding circuit |
Feb. 22, 1994 |
| 5257214 |
Qualification of register file write enables using self-timed floating point exception flags |
Oct. 26, 1993 |
| 5257215 |
Floating point and integer number conversions in a floating point adder |
Oct. 26, 1993 |
| 5235533 |
Store rounding in a floating point unit |
Aug. 10, 1993 |
| 5038313 |
Floating-point processor provided with high-speed detector of overflow and underflow exceptional conditions |
Aug. 6, 1991 |
| 4839846 |
Apparatus for performing floating point arithmetic operations and rounding the result thereof |
Jun. 13, 1989 |
| 4779220 |
Floating-point data rounding and normalizing circuit |
Oct. 18, 1988 |
| 4590584 |
Method and system for processing exponents in floating-point multiplication |
May. 20, 1986 |
| 4534010 |
Floating point type multiplier circuit with compensation for over-flow and under-flow in multiplication of numbers in two's compliment representation |
Aug. 6, 1985 |
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