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Class Information
Number: 708/209
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Shifting
Description: Subject matter where a number is changed by moving each digit therein simultaneously a specified number of positions in a specified direction.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7610472 |
Performing variable and/or bitwise shift operation for a shift instruction that does not provide a variable or bitwise shift option |
Oct. 27, 2009 |
| 7606848 |
Detector in parallel with a logic component |
Oct. 20, 2009 |
| 7548834 |
Method for processing sensor data |
Jun. 16, 2009 |
| 7543007 |
Residue-based error detection for a shift operation |
Jun. 2, 2009 |
| 7539715 |
Method and system for saturating a left shift result using a standard shifter |
May. 26, 2009 |
| 7523019 |
Method for processing sensor data |
Apr. 21, 2009 |
| 7480686 |
Method and apparatus for executing packed shift operations |
Jan. 20, 2009 |
| 7461108 |
Barrel shift device |
Dec. 2, 2008 |
| 7461109 |
Method and apparatus for providing packed shift operations in a processor |
Dec. 2, 2008 |
| 7454089 |
Interpolation system and method |
Nov. 18, 2008 |
| 7451169 |
Method and apparatus for providing packed shift operations in a processor |
Nov. 11, 2008 |
| 7409415 |
Processor system with efficient shift operations including EXTRACT operation |
Aug. 5, 2008 |
| 7392270 |
Apparatus and method for reducing the latency of sum-addressed shifters |
Jun. 24, 2008 |
| 7349934 |
Processor system and method with combined data left and right shift operation |
Mar. 25, 2008 |
| 7343388 |
Implementing crossbars and barrel shifters using multiplier-accumulator blocks |
Mar. 11, 2008 |
| 7340495 |
Superior misaligned memory load and copy using merge hardware |
Mar. 4, 2008 |
| 7337202 |
Shift-and-negate unit within a fused multiply-adder circuit |
Feb. 26, 2008 |
| 7320013 |
Method and apparatus for aligning operands for a processor |
Jan. 15, 2008 |
| 7272622 |
Method and apparatus for parallel shift right merge of data |
Sep. 18, 2007 |
| 7231561 |
Apparatus and method for data pattern alignment |
Jun. 12, 2007 |
| 7225212 |
Extended precision accumulator |
May. 29, 2007 |
| 7213129 |
Method and system for a two stage pipelined instruction decode and alignment using previous instruction length |
May. 1, 2007 |
| 7117232 |
Method and apparatus for providing packed shift operations in a processor |
Oct. 3, 2006 |
| 7035887 |
Apparatus and method for data shifting |
Apr. 25, 2006 |
| 7030792 |
Suppressing digital-to-analog converter (DAC) error |
Apr. 18, 2006 |
| 6983297 |
Shifting an operand left or right while minimizing the number of multiplexor stages |
Jan. 3, 2006 |
| 6978016 |
Circuits for calculating modular multiplicative inverse |
Dec. 20, 2005 |
| 6948014 |
Register for the parallel-serial conversion of data |
Sep. 20, 2005 |
| 6934729 |
Method and system for performing shift operations |
Aug. 23, 2005 |
| 6901503 |
Data processing circuits and interfaces |
May. 31, 2005 |
| 6901420 |
Method and apparatus for performing packed shift operations |
May. 31, 2005 |
| 6901419 |
Arithmetic unit |
May. 31, 2005 |
| 6895420 |
Apparatus and method for sharing data FET for a four-way multiplexer |
May. 17, 2005 |
| 6895424 |
Method and circuit for alignment of floating point significants in a SIMD array MPP |
May. 17, 2005 |
| 6877019 |
Barrel shifter |
Apr. 5, 2005 |
| 6865272 |
Executing permutations |
Mar. 8, 2005 |
| 6847378 |
System and method for performing scale and bias operations by preclamping input image data |
Jan. 25, 2005 |
| 6826584 |
Refinement of interpolated signals |
Nov. 30, 2004 |
| 6820186 |
System and method for building packets |
Nov. 16, 2004 |
| 6813657 |
Apparatus for processing a bit stream |
Nov. 2, 2004 |
| 6785389 |
System for bitstream generation |
Aug. 31, 2004 |
| 6779007 |
Wide shift array structure with low-voltage excursion sensing |
Aug. 17, 2004 |
| 6757819 |
Microprocessor with instructions for shifting data responsive to a signed count value |
Jun. 29, 2004 |
| 6754685 |
Dynamic popcount/shift circuit |
Jun. 22, 2004 |
| 6745216 |
Shift register allowing direct data insertion |
Jun. 1, 2004 |
| 6738793 |
Processor capable of executing packed shift operations |
May. 18, 2004 |
| 6715066 |
System and method for arranging bits of a data word in accordance with a mask |
Mar. 30, 2004 |
| 6675181 |
Method and apparatus for determining a byte select vector for a crossbar shifter |
Jan. 6, 2004 |
| 6675182 |
Method and apparatus for performing rotate operations using cascaded multiplexers |
Jan. 6, 2004 |
| 6654774 |
Generation of sign extended shifted numerical values |
Nov. 25, 2003 |
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