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Class Information
Number: 708/205
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Particular function performed > Format conversion > Normalization
Description: Subject matter in which the number in final form includes a single nonzero digit to the left of a radix point.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5790444 |
Fast alignment unit for multiply-add floating point unit |
Aug. 4, 1998 |
| 5771183 |
Apparatus and method for computation of sticky bit in a multi-stage shifter used for floating point arithmetic |
Jun. 23, 1998 |
| 5764549 |
Fast floating point result alignment apparatus |
Jun. 9, 1998 |
| 5757682 |
Parallel calculation of exponent and sticky bit during normalization |
May. 26, 1998 |
| 5754458 |
Trailing bit anticipator |
May. 19, 1998 |
| 5742536 |
Parallel calculation of exponent and sticky bit during normalization |
Apr. 21, 1998 |
| 5742535 |
Parallel calculation of exponent and sticky bit during normalization |
Apr. 21, 1998 |
| 5732007 |
Computer methods and apparatus for eliminating leading non-significant digits in floating point computations |
Mar. 24, 1998 |
| 5721944 |
Method and system for implementing relative time discriminations in a high speed data transmission network |
Feb. 24, 1998 |
| 5715470 |
Arithmetic apparatus for carrying out viterbi decoding at a high speed |
Feb. 3, 1998 |
| 5699285 |
Normalization circuit device of floating point computation device |
Dec. 16, 1997 |
| 5668984 |
Variable stage load path and method of operation |
Sep. 16, 1997 |
| 5657260 |
Priority detecting counter device |
Aug. 12, 1997 |
| 5646875 |
Denormalization system and method of operation |
Jul. 8, 1997 |
| 5633819 |
Inexact leading-one/leading-zero prediction integrated with a floating-point adder |
May. 27, 1997 |
| 5627774 |
Parallel calculation of exponent and sticky bit during normalization |
May. 6, 1997 |
| 5574670 |
Apparatus and method for determining a number of digits leading a particular digit |
Nov. 12, 1996 |
| 5570309 |
Iterative arithmetic processor |
Oct. 29, 1996 |
| 5559899 |
Method for the adaptive quantization of a range of input values |
Sep. 24, 1996 |
| 5553015 |
Efficient floating point overflow and underflow detection system |
Sep. 3, 1996 |
| 5550768 |
Rounding normalizer for floating point arithmetic operations |
Aug. 27, 1996 |
| 5550767 |
Method and apparatus for detecting underflow and overflow |
Aug. 27, 1996 |
| 5539685 |
Multiplier device with overflow detection function |
Jul. 23, 1996 |
| 5530659 |
Method and apparatus for decoding information within a processing device |
Jun. 25, 1996 |
| 5513362 |
Method of and apparatus for normalization of a floating point binary number |
Apr. 30, 1996 |
| 5493520 |
Two state leading zero/one anticipator (LZA) |
Feb. 20, 1996 |
| 5487022 |
Normalization method for floating point numbers |
Jan. 23, 1996 |
| 5483476 |
Mantissa addition system for a floating point adder |
Jan. 9, 1996 |
| 5469377 |
Floating point computing device for simplifying procedures accompanying addition or subtraction by detecting whether all of the bits of the digits of the mantissa are 0 or 1 |
Nov. 21, 1995 |
| 5430668 |
Floating point multiplier capable of easily performing a failure detection test |
Jul. 4, 1995 |
| 5424968 |
Priority encoder and floating-point adder-substractor |
Jun. 13, 1995 |
| 5408426 |
Arithmetic unit capable of performing concurrent operations for high speed operation |
Apr. 18, 1995 |
| 5392228 |
Result normalizer and method of operation |
Feb. 21, 1995 |
| 5384723 |
Method and apparatus for floating point normalization |
Jan. 24, 1995 |
| 5383142 |
Fast circuit and method for detecting predetermined bit patterns |
Jan. 17, 1995 |
| 5373461 |
Data processor a method and apparatus for performing postnormalization in a floating-point execution unit |
Dec. 13, 1994 |
| 5369607 |
Floating-point and fixed-point addition-subtraction assembly |
Nov. 29, 1994 |
| 5343413 |
Leading one anticipator and floating point addition/subtraction apparatus |
Aug. 30, 1994 |
| 5339267 |
Preprocessor of division device employing high radix division system |
Aug. 16, 1994 |
| 5325316 |
Compression processing method of real number data in processing system and apparatus therefor |
Jun. 28, 1994 |
| 5317527 |
Leading one/zero bit detector for floating point operation |
May. 31, 1994 |
| 5282156 |
Leading one anticipator and floating point addition/subtraction apparatus employing same |
Jan. 25, 1994 |
| 5276634 |
Floating point data processing apparatus which simultaneously effects summation and rounding computations |
Jan. 4, 1994 |
| 5267186 |
Normalizing pipelined floating point processing unit |
Nov. 30, 1993 |
| 5260887 |
Bit data shift amount detector |
Nov. 9, 1993 |
| 5241490 |
Fully decoded multistage leading zero detector and normalization apparatus |
Aug. 31, 1993 |
| 5204825 |
Method and apparatus for exact leading zero prediction for a floating-point adder |
Apr. 20, 1993 |
| 5187678 |
Priority encoder and floating-point normalization system for IEEE 754 standard |
Feb. 16, 1993 |
| 5153851 |
Method and arrangement of determining approximated reciprocal of binary normalized fraction of divisor |
Oct. 6, 1992 |
| 5144570 |
Normalization estimator |
Sep. 1, 1992 |
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