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Class Information
Number: 708/103
Name: Electrical computers: arithmetic processing and calculating > Electrical digital calculating computer > Pulse repetition rate > Multiplication or division
Description: Subject matter wherein the operation performed on an electrical signal is multiplication or division.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7512644 |
Rate multiplication method and rate multiplier |
Mar. 31, 2009 |
| 7457836 |
Bi-quad digital filter configured with a bit binary rate multiplier |
Nov. 25, 2008 |
| 7454450 |
Mixed-signal system for performing Taylor series function approximations |
Nov. 18, 2008 |
| 7395286 |
Method for generating non-overlapping N-phases of divide-by-N clocks with precise 1/N duty ratio using a shift register |
Jul. 1, 2008 |
| 7366345 |
Method of setting up multi-dimensional DDA variables |
Apr. 29, 2008 |
| 7343387 |
Algorithm for configuring clocking system |
Mar. 11, 2008 |
| 7328229 |
Clock divider with glitch free dynamic divide-by change |
Feb. 5, 2008 |
| 7317294 |
Pulse generator and method thereof |
Jan. 8, 2008 |
| 7272620 |
Frequency divider with low harmonics |
Sep. 18, 2007 |
| 7225092 |
Method and apparatus for measuring and adjusting the duty cycle of a high speed clock |
May. 29, 2007 |
| 7197522 |
Bi-quad digital filter configured with a bit binary rate multiplier |
Mar. 27, 2007 |
| 7124154 |
Clock divider |
Oct. 17, 2006 |
| 7124153 |
Frequency converter and methods of use thereof |
Oct. 17, 2006 |
| 7103622 |
Direct digital synthesizer with output signal jitter reduction |
Sep. 5, 2006 |
| 7072920 |
Method and apparatus for digital frequency conversion |
Jul. 4, 2006 |
| 7027598 |
Residue number system based pre-computation and dual-pass arithmetic modular operation approach to implement encryption protocols efficiently in electronic integrated circuits |
Apr. 11, 2006 |
| 7027597 |
Pre-computation and dual-pass modular arithmetic operation approach to implement encryption protocols efficiently in electronic integrated circuits |
Apr. 11, 2006 |
| 6978016 |
Circuits for calculating modular multiplicative inverse |
Dec. 20, 2005 |
| 6956793 |
Phase clock selector for generating a non-integer frequency division |
Oct. 18, 2005 |
| 6839728 |
Efficient complex multiplication and fast fourier transform (FFT) implementation on the manarray architecture |
Jan. 4, 2005 |
| 6807552 |
Programmable non-integer fractional divider |
Oct. 19, 2004 |
| 6725245 |
High speed programmable counter architecture |
Apr. 20, 2004 |
| 6661298 |
Method and apparatus for a digital clock multiplication circuit |
Dec. 9, 2003 |
| 6529052 |
Frequency multiplier based on exclusive-or gate and frequency divider |
Mar. 4, 2003 |
| 6441656 |
Clock divider for analysis of all clock edges |
Aug. 27, 2002 |
| 6407596 |
Apparatus and method for a clock period subdivider |
Jun. 18, 2002 |
| 6356123 |
Non-integer frequency divider |
Mar. 12, 2002 |
| 6351756 |
Clock signal multiplier circuit for a clock signal generator circuit |
Feb. 26, 2002 |
| 6346833 |
Frequency multiplier circuit |
Feb. 12, 2002 |
| 6249235 |
Sampling frequency conversion apparatus and fractional frequency dividing apparatus for sampling frequency |
Jun. 19, 2001 |
| 6112217 |
Method and apparatus for generating clock signals |
Aug. 29, 2000 |
| 6076096 |
Binary rate multiplier |
Jun. 13, 2000 |
| 6064740 |
Method and apparatus for masking modulo exponentiation calculations in an integrated circuit |
May. 16, 2000 |
| 6003053 |
Pulse signal generation circuit and pulse signal generation method |
Dec. 14, 1999 |
| 5948046 |
Multi-divide frequency division |
Sep. 7, 1999 |
| 5854755 |
Clock frequency multiplication device |
Dec. 29, 1998 |
| 5841684 |
Method and apparatus for computer implemented constant multiplication with multipliers having repeated patterns including shifting of replicas and patterns having at least two digit positions |
Nov. 24, 1998 |
| 5822229 |
Circuit arrangement for frequency multiplication |
Oct. 13, 1998 |
| 5740458 |
Protocol processor intended for the execution of a collection of instructions in a reduced number of operations |
Apr. 14, 1998 |
| 5719798 |
Programmable modulo k counter |
Feb. 17, 1998 |
| 5633814 |
Non-modulo power of 2 frequency divider |
May. 27, 1997 |
| 5625806 |
Self configuring speed path in a microprocessor with multiple clock option |
Apr. 29, 1997 |
| 5473553 |
Frequency dividing device |
Dec. 5, 1995 |
| 5422835 |
Digital clock signal multiplier circuit |
Jun. 6, 1995 |
| 5287296 |
Clock generators having programmable fractional frequency division |
Feb. 15, 1994 |
| 5267182 |
Diophantine synthesizer |
Nov. 30, 1993 |
| 5255213 |
Apparatus for providing selectable fractional output signals |
Oct. 19, 1993 |
| 5235531 |
Method and arrangement for dividing the frequency of an alternating voltage with a non-whole-numbered division factor |
Aug. 10, 1993 |
| 5088057 |
Rational rate frequency generator |
Feb. 11, 1992 |
| 5023822 |
Pulse ratio system |
Jun. 11, 1991 |
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