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Class Information
Number: 706/921
Name: Data processing: artificial intelligence > Application using ai with detail of the ai system > Designing, planning, programming, cad, case > Layout (e.g., circuit, construction)
Description: Subject matter wherein the expert system provides layout related data, e.g. computer circuit layout or building layout.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7337154 |
Method for solving the binary minimization problem and a variant thereof |
Feb. 26, 2008 |
| 7024636 |
Chip management system |
Apr. 4, 2006 |
| 7020852 |
Automation of the development, testing, and release of a flow framework and methodology to design integrated circuits |
Mar. 28, 2006 |
| 6968517 |
Method of interactive optimization in circuit design |
Nov. 22, 2005 |
| 6751735 |
Apparatus for control of cryptography implementations in third party applications |
Jun. 15, 2004 |
| 6424959 |
Method and apparatus for automatic synthesis, placement and routing of complex structures |
Jul. 23, 2002 |
| 6292766 |
Simulation tool input file generator for interface circuitry |
Sep. 18, 2001 |
| 6283759 |
System for demonstrating compliance with standards |
Sep. 4, 2001 |
| 5892678 |
LSI design automation system |
Apr. 6, 1999 |
| 5856925 |
Method for making electronic circuit design data and CAD system using the method |
Jan. 5, 1999 |
| 5812740 |
Advanced modular cell placement system with neighborhood system driven optimization |
Sep. 22, 1998 |
| 5768161 |
Data processing apparatus |
Jun. 16, 1998 |
| 5761080 |
Method and apparatus for modeling capacitance in an integrated circuit |
Jun. 2, 1998 |
| 5748844 |
Graph partitioning system |
May. 5, 1998 |
| 5734572 |
Tool which automatically produces an abstract specification of a physical system and a process for producing a physical system using such a tool |
Mar. 31, 1998 |
| 5734798 |
Method and apparatus for extracting a gate modeled circuit from a fet modeled circuit |
Mar. 31, 1998 |
| 5640497 |
Layout redesign using polygon manipulation |
Jun. 17, 1997 |
| 5592392 |
Integrated circuit design apparatus with extensible circuit elements |
Jan. 7, 1997 |
| 5572710 |
High speed logic simulation system using time division emulation suitable for large scale logic circuits |
Nov. 5, 1996 |
| 5563993 |
Logic simulator system using both free-format display format and stream display format |
Oct. 8, 1996 |
| 5557537 |
Method and apparatus for designing and editing a distribution system for a building |
Sep. 17, 1996 |
| 5553274 |
Vertex minimization in a smart optical proximity correction system |
Sep. 3, 1996 |
| 5553273 |
Vertex minimization in a smart optical proximity correction system |
Sep. 3, 1996 |
| 5550839 |
Mask-programmed integrated circuits having timing and logic compatibility to user-configured logic arrays |
Aug. 27, 1996 |
| 5546321 |
Method and apparatus for the cross-sectional design of multi-layer printed circuit boards |
Aug. 13, 1996 |
| 5535134 |
Object placement aid |
Jul. 9, 1996 |
| 5519633 |
Method and apparatus for the cross-sectional design of multi-layer printed circuit boards |
May. 21, 1996 |
| 5517428 |
Optimizing a piping system |
May. 14, 1996 |
| 5490232 |
Computer-aided thought process simulation design system |
Feb. 6, 1996 |
| 5452224 |
Method of computing multi-conductor parasitic capacitances for VLSI circuits |
Sep. 19, 1995 |
| 5416718 |
Circuit design support system and circuit producing method |
May. 16, 1995 |
| 5353401 |
Automatic interface layout generator for database systems |
Oct. 4, 1994 |
| 5329464 |
Utility layout design system |
Jul. 12, 1994 |
| 5311443 |
Rule based floorplanner |
May. 10, 1994 |
| 5267146 |
System for designing configuration with design elements characterized by fuzzy sets |
Nov. 30, 1993 |
| 5228117 |
Expert system development support system and expert system environment utilizing a frame processing technique |
Jul. 13, 1993 |
| 5225987 |
System for implementing a PC computer configuration system for assembling and mounting of a complex product in situ |
Jul. 6, 1993 |
| 5212650 |
Procedure and data structure for synthesis and transformation of logic circuit designs |
May. 18, 1993 |
| 5204939 |
Rule base processing system and rule evaluation control method therein |
Apr. 20, 1993 |
| 5200908 |
Placement optimizing method/apparatus and apparatus for designing semiconductor devices |
Apr. 6, 1993 |
| 5197116 |
Method of resolution for rule conflict in a knowledge based system |
Mar. 23, 1993 |
| 5175696 |
Rule structure in a procedure for synthesis of logic circuits |
Dec. 29, 1992 |
| 5151867 |
Method of minimizing sum-of-product cases in a heterogeneous data base environment for circuit synthesis |
Sep. 29, 1992 |
| 5150308 |
Parameter and rule creation and modification mechanism for use by a procedure for synthesis of logic circuit designs |
Sep. 22, 1992 |
| 5146583 |
Logic design system for creating circuit configuration by generating parse tree from hardware description language and optimizing text level redundancy thereof |
Sep. 8, 1992 |
| 5095441 |
Rule inference and localization during synthesis of logic circuit designs |
Mar. 10, 1992 |
| 5043914 |
Circuit transformation system, circuit transformation method, inverted logic generation method, and logic design system |
Aug. 27, 1991 |
| 5038294 |
Automatic generating system of connection configuration diagram among units |
Aug. 6, 1991 |
| 4992953 |
Computer assisted design method and apparatus |
Feb. 12, 1991 |
| 4965741 |
Method for providing an improved human user interface to a knowledge based system |
Oct. 23, 1990 |
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