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Class Information
Number: 703/19
Name: Data processing: structural design, modeling, simulation, and emulation > Simulating electronic device or electrical system > Timing
Description: Subject matter wherein the timing delay of the electrical device or the electrical system is being simulated.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6934674 Clock generation and distribution in an emulation system Aug. 23, 2005
6934872 Method and apparatus for optimizing clock distribution to reduce the effect of power supply noise Aug. 23, 2005
6912494 Method of reducing delays Jun. 28, 2005
6907394 Device for simulating circuits, method for simulating the same, and recording medium Jun. 14, 2005
6895372 System and method for VLSI visualization May. 17, 2005
6879927 Communication interface for virtual IC tester Apr. 12, 2005
6880142 Method of delay calculation for variation in interconnect metal process Apr. 12, 2005
6877145 Automatic generation of interconnect logic components Apr. 5, 2005
6876961 Electronic system modeling using actual and approximated system properties Apr. 5, 2005
6853969 Method and system for estimating interconnect delay Feb. 8, 2005
6853968 Simulation of data processing apparatus Feb. 8, 2005
6850879 Microcomputer with emulator interface Feb. 1, 2005
6842728 Time-multiplexing data between asynchronous clock domains within cycle simulation and emulation environments Jan. 11, 2005
6836766 Rule based configuration engine for a database Dec. 28, 2004
6836876 Semiconductor integrated circuit wiring condition processing program Dec. 28, 2004
6836756 Time simulation techniques to determine network availability Dec. 28, 2004
6832182 Circuit simulator Dec. 14, 2004
6829755 Variable detail automatic invocation of transistor level timing for application specific integrated circuit static timing analysis Dec. 7, 2004
6829572 Method and system for efficiently overriding array net values in a logic simulator machine Dec. 7, 2004
6817000 Delay correlation analysis and representation for vital complaint VHDL models Nov. 9, 2004
6816826 Fully exhibiting asynchronous behavior in a logic network simulation Nov. 9, 2004
6799153 Cross coupling delay characterization for integrated circuits Sep. 28, 2004
6795802 Apparatus and method for calculating temporal deterioration margin amount of LSI, and LSI inspection method Sep. 21, 2004
6789055 Timing verification checking value extracting method Sep. 7, 2004
6789242 Method and system for integrated circuit design and diagnosis Sep. 7, 2004
6785875 Methods and apparatus for facilitating physical synthesis of an integrated circuit design Aug. 31, 2004
6769100 Method and system for power node current waveform modeling Jul. 27, 2004
6763506 Method of optimizing the design of electronic systems having multiple timing constraints Jul. 13, 2004
6754598 Electromagnetic interference analysis method and apparatus Jun. 22, 2004
6751759 Method and apparatus for pipeline hazard detection Jun. 15, 2004
6751583 Hardware and software co-simulation including simulating a target processor using binary translation Jun. 15, 2004
6725449 Semiconductor test program debugging apparatus Apr. 20, 2004
6714902 Method and apparatus for critical and false path verification Mar. 30, 2004
6714903 Placement and routing of circuits using a combined processing/buffer cell Mar. 30, 2004
6711533 Method for controlling a double-resonance generator Mar. 23, 2004
6704697 Unified timing analysis for model interface layout parasitics Mar. 9, 2004
6691080 Task execution time estimating method Feb. 10, 2004
6678644 Integrated circuit models having associated timing exception information therewith for use with electronic design automation Jan. 13, 2004
6658634 Logic power optimization algorithm Dec. 2, 2003
6654713 Method to compress a piecewise linear waveform so compression error occurs on only one side of the waveform Nov. 25, 2003
6654712 Method to reduce skew in clock signal distribution using balanced wire widths Nov. 25, 2003
6643683 Interactive client-server environment for performing collaborative timing analysis of circuit designs Nov. 4, 2003
6634010 ASIC design support system Oct. 14, 2003
6629299 Delay library representation method, delay library generation method and delay calculation method using the delay library Sep. 30, 2003
6625572 Cycle modeling in cycle accurate software simulators of hardware modules for software/software cross-simulation and hardware/software co-simulation Sep. 23, 2003
6622290 Timing verification method employing dynamic abstraction in core/shell partitioning Sep. 16, 2003
6615396 Searching for a path through a circuit Sep. 2, 2003
6604066 Method and apparatus for calculating delay for logic circuit and method of calculating delay data for delay library Aug. 5, 2003
6567961 Method for detecting lack of synchronism in VLSI designs during high level simulation May. 20, 2003
6553550 Method and apparatus for computing delay correlation effects in digital circuits Apr. 22, 2003

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